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authorWerner Almesberger <werner@openmoko.org>2009-03-11 11:25:20 +0000
committerAndy Green <agreen@octopus.localdomain>2009-03-11 11:25:20 +0000
commit921ada306538262acc10bc518b0fb07520f2403e (patch)
tree4414d222d5d2c366b4c5a7d3ad4bfbc5b2646ab4 /arch
parent705dd60511374f351b15a6af203a612d56572f91 (diff)
Add real CAMIF clock to S3C6410
This patch adds the real "camif" clock (off HCLK.) Signed-off-by: Werner Almesberger <werner@openmoko.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/plat-s3c/include/plat/clock.h1
-rw-r--r--arch/arm/plat-s3c64xx/clock.c2
-rw-r--r--arch/arm/plat-s3c64xx/s3c6400-clock.c24
3 files changed, 26 insertions, 1 deletions
diff --git a/arch/arm/plat-s3c/include/plat/clock.h b/arch/arm/plat-s3c/include/plat/clock.h
index d86af84b5b8..3ca015b9936 100644
--- a/arch/arm/plat-s3c/include/plat/clock.h
+++ b/arch/arm/plat-s3c/include/plat/clock.h
@@ -81,6 +81,7 @@ extern void s3c2443_setup_clocks(void);
/* S3C64XX specific functions and clocks */
+extern int s3c64xx_hclk_ctrl(struct clk *clk, int enable);
extern int s3c64xx_sclk_ctrl(struct clk *clk, int enable);
/* Init for pwm clock code */
diff --git a/arch/arm/plat-s3c64xx/clock.c b/arch/arm/plat-s3c64xx/clock.c
index bebf838d105..e5e43fcb744 100644
--- a/arch/arm/plat-s3c64xx/clock.c
+++ b/arch/arm/plat-s3c64xx/clock.c
@@ -89,7 +89,7 @@ static int s3c64xx_pclk_ctrl(struct clk *clk, int enable)
return s3c64xx_gate(S3C_PCLK_GATE, clk, enable);
}
-static int s3c64xx_hclk_ctrl(struct clk *clk, int enable)
+int s3c64xx_hclk_ctrl(struct clk *clk, int enable)
{
return s3c64xx_gate(S3C_HCLK_GATE, clk, enable);
}
diff --git a/arch/arm/plat-s3c64xx/s3c6400-clock.c b/arch/arm/plat-s3c64xx/s3c6400-clock.c
index 7602cf8e674..001cba98abc 100644
--- a/arch/arm/plat-s3c64xx/s3c6400-clock.c
+++ b/arch/arm/plat-s3c64xx/s3c6400-clock.c
@@ -622,6 +622,28 @@ static struct clksrc_clk clk_camera = {
.reg_divider = S3C_CLK_DIV0,
};
+static struct clk *clkset_camif_list[] = {
+ &clk_h,
+};
+
+static struct clk_sources clkset_camif = {
+ .sources = clkset_camif_list,
+ .nr_sources = ARRAY_SIZE(clkset_camif_list),
+};
+
+static struct clksrc_clk clk_camif = {
+ .clk = {
+ .name = "camif",
+ .id = -1,
+ .ctrlbit = S3C_CLKCON_HCLK_CAMIF,
+ .enable = s3c64xx_hclk_ctrl,
+ .set_parent = s3c64xx_setparent_clksrc,
+ },
+ .shift = 0,
+ .mask = 0,
+ .sources = &clkset_camif,
+};
+
/* Clock initialisation code */
static struct clksrc_clk *init_parents[] = {
@@ -639,6 +661,7 @@ static struct clksrc_clk *init_parents[] = {
&clk_audio1,
&clk_irda,
&clk_camif,
+ &clk_camera,
};
static void __init_or_cpufreq s3c6400_set_clksrc(struct clksrc_clk *clk)
@@ -740,6 +763,7 @@ static struct clk *clks[] __initdata = {
&clk_audio1.clk,
&clk_irda.clk,
&clk_camera.clk,
+ &clk_camif.clk,
&clk_arm,
};