diff options
| author | David Daney <ddaney@caviumnetworks.com> | 2009-07-13 11:15:20 -0700 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2009-09-17 20:07:50 +0200 |
| commit | 9d24bafb0d1ecf636f71a56f9d6f071f5c7a882d (patch) | |
| tree | b9d9867cc2ca51b905791409390ee647bcbd7952 /arch | |
| parent | b791d1193af9772040e592d5aa161790f800b762 (diff) | |
MIPS: Octeon: Set kernel_uses_llsc to false on non-SMP builds.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h index 3d830756b13..425e708d4fb 100644 --- a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h +++ b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h @@ -31,12 +31,16 @@ #define cpu_has_cache_cdex_s 0 #define cpu_has_prefetch 1 +#define cpu_has_llsc 1 /* - * We should disable LL/SC on non SMP systems as it is faster to - * disable interrupts for atomic access than a LL/SC. Unfortunatly we - * cannot as this breaks asm/futex.h + * We Disable LL/SC on non SMP systems as it is faster to disable + * interrupts for atomic access than a LL/SC. */ -#define cpu_has_llsc 1 +#ifdef CONFIG_SMP +# define kernel_uses_llsc 1 +#else +# define kernel_uses_llsc 0 +#endif #define cpu_has_vtag_icache 1 #define cpu_has_dc_aliases 0 #define cpu_has_ic_fills_f_dc 0 |