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author | Chien Tung <chien.tin.tung@intel.com> | 2009-04-08 14:27:18 -0700 |
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committer | Roland Dreier <rolandd@cisco.com> | 2009-04-08 14:27:18 -0700 |
commit | a4849fc157cdbe4fb68cfe37e7222697f003deb5 (patch) | |
tree | 315f1f55d5167b8006cf40d175b6eaae6914d43c /arch | |
parent | 1b9493248cf5e9f1ecc045488100cbf3ccd91be1 (diff) |
RDMA/nes: Add wide_ppm_offset parm for switch compatibility
We have observed unstable link with a new BNT switch.
Add wide_ppm_offset parameter to allow the user to control the clock
ppm offset on the CX4 interface for better compatibility. Default is
100ppm, setting it to 1 will increase it to 300ppm. Change default
SerDes1 reference clock to external source.
Signed-off-by: Chien Tung <chien.tin.tung@intel.com>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'arch')
0 files changed, 0 insertions, 0 deletions