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authordave graham <david.graham@intel.com>2009-02-10 12:51:41 +0000
committerDavid S. Miller <davem@davemloft.net>2009-02-10 17:00:27 -0800
commit5df3f0eaf8b236cc785e2733a3df1e5c84e4aad8 (patch)
tree2a1839f02ef900c5bcbfd789c88839fed1f436fb /crypto
parent111b9dc5c981ba608b4afede37237cfeb67b07f2 (diff)
e1000e: Disable dynamic clock gating for 82571 per si errata.
82571 and 82572 Errata #13 documents that the Si feature DMA Dynamic Clock Gating should be disabled, and identifies the workaround of disabling the feature by EEPROM setting. EEPROM versions that do not include the recommended workaround have been found in the field, and so some customers remain at risk. Because the feature DMA Dynamic clock Gating can be disabled by directly setting the appropriate bit in the E1000_CTRL_EXT register, this patch overrides the EEPROM setting, and force-disables the feature. Signed-off-by: dave graham <david.graham@intel.com> Acked-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'crypto')
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