diff options
| author | Keith Packard <keithp@keithp.com> | 2008-10-14 19:55:10 -0700 |
|---|---|---|
| committer | Dave Airlie <airlied@linux.ie> | 2008-10-18 07:10:53 +1000 |
| commit | ba1eb1d825fdef40f69871caf8e5842d00efbbc5 (patch) | |
| tree | 73b45769022788532ee169c270e2792a229b1a40 /drivers/gpu/drm/i915/i915_drv.h | |
| parent | 50aa253d820ad4577e2231202f2c8fd89f9dc4e6 (diff) | |
i915: Map status page cached for chips with GTT-based HWS location.
This should improve performance by avoiding uncached reads by the CPU (the
point of having a status page), and may improve stability. This patch only
affects G33, GM45 and G45 chips as those are the only ones using GTT-based
HWS mappings.
Signed-off-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index da7c0072ad4..eae4ed3956e 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -373,6 +373,9 @@ struct drm_i915_gem_object { /** Current tiling mode for the object. */ uint32_t tiling_mode; + /** AGP mapping type (AGP_USER_MEMORY or AGP_USER_CACHED_MEMORY */ + uint32_t agp_type; + /** * Flagging of which individual pages are valid in GEM_DOMAIN_CPU when * GEM_DOMAIN_CPU is not in the object's read domain. |