diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-04-01 09:19:42 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-04-01 09:19:42 -0700 |
commit | 42be79e37e264557f12860fa4cc84b4de3685954 (patch) | |
tree | 8ead77e9bb5ed55412c71e2f6fd8e6b8d4581da6 /drivers/gpu/drm/radeon/rs600.c | |
parent | 445c682b93479c06d1b062b63ed79202f3ed5503 (diff) | |
parent | d668046c13024d74af7d04a124ba55f406380fe7 (diff) |
Merge branch 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (76 commits)
drm/radeon/kms: enable ACPI powermanagement mode on radeon gpus.
drm/radeon/kms: rs400/480 should set common registers.
drm/radeon/kms: add sanity check to wptr.
drm/radeon/kms/evergreen: get DP working
drm/radeon/kms: add hw_i2c module option
drm/radeon/kms: use new pre/post_xfer i2c bit algo hooks
drm/radeon/kms: disable MSI on IGP chips
drm/radeon/kms: display watermark updates (v2)
drm/radeon/kms/dp: disable training pattern on the sink at the end of link training
drm/radeon/kms: minor fixes for eDP with LCD* device tags (v2)
drm/radeon/kms/dp: remove extraneous training complete call
drm/radeon/kms/atom: minor fixes to transmitter setup
drm/radeon/kms: Only restrict BO to visible VRAM size when pinning to VRAM.
drm: fix build error when SYSRQ is disabled
drm/radeon/kms: fix macbookpro connector quirk
drm/radeon/r6xx/r7xx: further safe reg clean up
drm/radeon: bump the UMS driver version for r6xx/r7xx const buffer support
drm/radeon/kms: bump the version for r6xx/r7xx const buffer support
drm/radeon/r6xx/r7xx: CS parser fixes
drm/radeon/kms: fix some typos in r6xx/r7xx hpd setup
...
Fix up MSI-related conflicts in drivers/gpu/drm/radeon/radeon_irq_kms.c
Diffstat (limited to 'drivers/gpu/drm/radeon/rs600.c')
-rw-r--r-- | drivers/gpu/drm/radeon/rs600.c | 33 |
1 files changed, 31 insertions, 2 deletions
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c index 47f046b78c6..abf824c2123 100644 --- a/drivers/gpu/drm/radeon/rs600.c +++ b/drivers/gpu/drm/radeon/rs600.c @@ -37,6 +37,7 @@ */ #include "drmP.h" #include "radeon.h" +#include "radeon_asic.h" #include "atom.h" #include "rs600d.h" @@ -267,9 +268,9 @@ void rs600_gart_disable(struct radeon_device *rdev) void rs600_gart_fini(struct radeon_device *rdev) { + radeon_gart_fini(rdev); rs600_gart_disable(rdev); radeon_gart_table_vram_free(rdev); - radeon_gart_fini(rdev); } #define R600_PTE_VALID (1 << 0) @@ -392,10 +393,12 @@ int rs600_irq_process(struct radeon_device *rdev) /* Vertical blank interrupts */ if (G_007EDC_LB_D1_VBLANK_INTERRUPT(r500_disp_int)) { drm_handle_vblank(rdev->ddev, 0); + rdev->pm.vblank_sync = true; wake_up(&rdev->irq.vblank_queue); } if (G_007EDC_LB_D2_VBLANK_INTERRUPT(r500_disp_int)) { drm_handle_vblank(rdev->ddev, 1); + rdev->pm.vblank_sync = true; wake_up(&rdev->irq.vblank_queue); } if (G_007EDC_DC_HOT_PLUG_DETECT1_INTERRUPT(r500_disp_int)) { @@ -472,13 +475,38 @@ void rs600_mc_init(struct radeon_device *rdev) rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev); base = RREG32_MC(R_000004_MC_FB_LOCATION); base = G_000004_MC_FB_START(base) << 16; + rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev); radeon_vram_location(rdev, &rdev->mc, base); radeon_gtt_location(rdev, &rdev->mc); + radeon_update_bandwidth_info(rdev); } void rs600_bandwidth_update(struct radeon_device *rdev) { - /* FIXME: implement, should this be like rs690 ? */ + struct drm_display_mode *mode0 = NULL; + struct drm_display_mode *mode1 = NULL; + u32 d1mode_priority_a_cnt, d2mode_priority_a_cnt; + /* FIXME: implement full support */ + + radeon_update_display_priority(rdev); + + if (rdev->mode_info.crtcs[0]->base.enabled) + mode0 = &rdev->mode_info.crtcs[0]->base.mode; + if (rdev->mode_info.crtcs[1]->base.enabled) + mode1 = &rdev->mode_info.crtcs[1]->base.mode; + + rs690_line_buffer_adjust(rdev, mode0, mode1); + + if (rdev->disp_priority == 2) { + d1mode_priority_a_cnt = RREG32(R_006548_D1MODE_PRIORITY_A_CNT); + d2mode_priority_a_cnt = RREG32(R_006D48_D2MODE_PRIORITY_A_CNT); + d1mode_priority_a_cnt |= S_006548_D1MODE_PRIORITY_A_ALWAYS_ON(1); + d2mode_priority_a_cnt |= S_006D48_D2MODE_PRIORITY_A_ALWAYS_ON(1); + WREG32(R_006548_D1MODE_PRIORITY_A_CNT, d1mode_priority_a_cnt); + WREG32(R_00654C_D1MODE_PRIORITY_B_CNT, d1mode_priority_a_cnt); + WREG32(R_006D48_D2MODE_PRIORITY_A_CNT, d2mode_priority_a_cnt); + WREG32(R_006D4C_D2MODE_PRIORITY_B_CNT, d2mode_priority_a_cnt); + } } uint32_t rs600_mc_rreg(struct radeon_device *rdev, uint32_t reg) @@ -598,6 +626,7 @@ int rs600_suspend(struct radeon_device *rdev) void rs600_fini(struct radeon_device *rdev) { + radeon_pm_fini(rdev); r100_cp_fini(rdev); r100_wb_fini(rdev); r100_ib_fini(rdev); |