diff options
author | Ingo Molnar <mingo@elte.hu> | 2009-04-08 10:35:30 +0200 |
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committer | Ingo Molnar <mingo@elte.hu> | 2009-04-08 10:35:30 +0200 |
commit | 5ea472a77f8e4811ceee3f44a9deda6ad6e8b789 (patch) | |
tree | a9ec5019e2b666a19874fc344ffb0dd5da6bce94 /drivers/media/video/au0828/au0828-reg.h | |
parent | 6c009ecef8cca28c7c09eb16d0802e37915a76e1 (diff) | |
parent | 577c9c456f0e1371cbade38eaf91ae8e8a308555 (diff) |
Merge commit 'v2.6.30-rc1' into perfcounters/core
Conflicts:
arch/powerpc/include/asm/systbl.h
arch/powerpc/include/asm/unistd.h
include/linux/init_task.h
Merge reason: the conflicts are non-trivial: PowerPC placement
of sys_perf_counter_open has to be mixed with the
new preadv/pwrite syscalls.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'drivers/media/video/au0828/au0828-reg.h')
-rw-r--r-- | drivers/media/video/au0828/au0828-reg.h | 35 |
1 files changed, 28 insertions, 7 deletions
diff --git a/drivers/media/video/au0828/au0828-reg.h b/drivers/media/video/au0828/au0828-reg.h index b15e4a3b6fc..c39f3d2b721 100644 --- a/drivers/media/video/au0828/au0828-reg.h +++ b/drivers/media/video/au0828/au0828-reg.h @@ -30,15 +30,36 @@ #define AU0828_SENSORCTRL_100 0x100 #define AU0828_SENSORCTRL_VBI_103 0x103 -#define REG_200 0x200 -#define REG_201 0x201 -#define REG_202 0x202 -#define REG_203 0x203 -#define REG_205 0x205 -#define REG_209 0x209 -#define REG_2FF 0x2ff +/* I2C registers */ +#define AU0828_I2C_TRIGGER_200 0x200 +#define AU0828_I2C_STATUS_201 0x201 +#define AU0828_I2C_CLK_DIVIDER_202 0x202 +#define AU0828_I2C_DEST_ADDR_203 0x203 +#define AU0828_I2C_WRITE_FIFO_205 0x205 +#define AU0828_I2C_READ_FIFO_209 0x209 +#define AU0828_I2C_MULTIBYTE_MODE_2FF 0x2ff /* Audio registers */ #define AU0828_AUDIOCTRL_50C 0x50C #define REG_600 0x600 + +/*********************************************************************/ +/* Here are constants for values associated with the above registers */ + +/* I2C Trigger (Reg 0x200) */ +#define AU0828_I2C_TRIGGER_WRITE 0x01 +#define AU0828_I2C_TRIGGER_READ 0x20 +#define AU0828_I2C_TRIGGER_HOLD 0x40 + +/* I2C Status (Reg 0x201) */ +#define AU0828_I2C_STATUS_READ_DONE 0x01 +#define AU0828_I2C_STATUS_NO_READ_ACK 0x02 +#define AU0828_I2C_STATUS_WRITE_DONE 0x04 +#define AU0828_I2C_STATUS_NO_WRITE_ACK 0x08 +#define AU0828_I2C_STATUS_BUSY 0x10 + +/* I2C Clock Divider (Reg 0x202) */ +#define AU0828_I2C_CLK_250KHZ 0x07 +#define AU0828_I2C_CLK_100KHZ 0x14 +#define AU0828_I2C_CLK_30KHZ 0x40 |