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authorSteven Toth <stoth@hauppauge.com>2007-09-04 21:36:32 -0300
committerMauro Carvalho Chehab <mchehab@infradead.org>2007-10-09 22:08:22 -0300
commit31bae4a62036a1d85aa9ee5864115dad2727336d (patch)
tree112abf7e30ededa86b7243eb0588d146f457a464 /drivers/media
parent2e52f215be1b3a0337788c8d3345bdf5e3894e19 (diff)
V4L/DVB (6171): cx23885: Cleaning up defines
Moving some defines into the correct header file. Signed-off-by: Steven Toth <stoth@hauppauge.com> Signed-off-by: Michael Krufky <mkrufky@linuxtv.org> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
Diffstat (limited to 'drivers/media')
-rw-r--r--drivers/media/video/cx23885/cx23885-core.c19
-rw-r--r--drivers/media/video/cx23885/cx23885-reg.h11
2 files changed, 10 insertions, 20 deletions
diff --git a/drivers/media/video/cx23885/cx23885-core.c b/drivers/media/video/cx23885/cx23885-core.c
index 7a1c4672041..fa5f6488b99 100644
--- a/drivers/media/video/cx23885/cx23885-core.c
+++ b/drivers/media/video/cx23885/cx23885-core.c
@@ -1251,25 +1251,6 @@ static void cx23885_timeout(unsigned long data)
do_cancel_buffers(port, "timeout", 1);
}
-#define PCI_MSK_APB_DMA (1 << 12)
-#define PCI_MSK_AL_WR (1 << 11)
-#define PCI_MSK_AL_RD (1 << 10)
-#define PCI_MSK_RISC_WR (1 << 9)
-#define PCI_MSK_RISC_RD (1 << 8)
-
-#define PCI_MSK_AUD_EXT (1 << 4)
-#define PCI_MSK_AUD_INT (1 << 3)
-#define PCI_MSK_VID_C (1 << 2)
-#define PCI_MSK_VID_B (1 << 1)
-#define PCI_MSK_VID_A 1
-
-#define VID_C_MSK_BAD_PKT (1 << 20)
-#define VID_C_MSK_OPC_ERR (1 << 16)
-#define VID_C_MSK_SYNC (1 << 12)
-#define VID_C_MSK_OF (1 << 8)
-#define VID_C_MSK_RISCI2 (1 << 4)
-#define VID_C_MSK_RISCI1 1
-
static irqreturn_t cx23885_irq(int irq, void *dev_id)
{
struct cx23885_dev *dev = dev_id;
diff --git a/drivers/media/video/cx23885/cx23885-reg.h b/drivers/media/video/cx23885/cx23885-reg.h
index 6527bd3b4d7..63ab0fb26ac 100644
--- a/drivers/media/video/cx23885/cx23885-reg.h
+++ b/drivers/media/video/cx23885/cx23885-reg.h
@@ -211,7 +211,7 @@ Channel manager Data Structure entry = 20 DWORD
#define I2S_TX_CFG 0x0000001A
#define DEV_CNTRL2 0x00040000
-#define PCI_INT_MSK 0x00040010
+
#define PCI_MSK_APB_DMA (1 << 12)
#define PCI_MSK_AL_WR (1 << 11)
#define PCI_MSK_AL_RD (1 << 10)
@@ -222,6 +222,8 @@ Channel manager Data Structure entry = 20 DWORD
#define PCI_MSK_VID_C (1 << 2)
#define PCI_MSK_VID_B (1 << 1)
#define PCI_MSK_VID_A 1
+#define PCI_INT_MSK 0x00040010
+
#define PCI_INT_STAT 0x00040014
#define PCI_INT_MSTAT 0x00040018
@@ -235,7 +237,14 @@ Channel manager Data Structure entry = 20 DWORD
#define VID_B_INT_MSTAT 0x00040038
#define VID_B_INT_SSTAT 0x0004003C
+#define VID_C_MSK_BAD_PKT (1 << 20)
+#define VID_C_MSK_OPC_ERR (1 << 16)
+#define VID_C_MSK_SYNC (1 << 12)
+#define VID_C_MSK_OF (1 << 8)
+#define VID_C_MSK_RISCI2 (1 << 4)
+#define VID_C_MSK_RISCI1 1
#define VID_C_INT_MSK 0x00040040
+
#define VID_C_MSK_BAD_PKT (1 << 20)
#define VID_C_MSK_OPC_ERR (1 << 16)
#define VID_C_MSK_SYNC (1 << 12)