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authorBridge Wu <bridge.wu@marvell.com>2007-12-13 07:24:30 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-01-26 15:07:52 +0000
commit64eb036af42d3816364c4db49d93be3a4614389c (patch)
tree920a52c9b29aace4006d753fc8b1d43754bca0fc /drivers/mmc/host
parent9e2697ff371b4380dca108a66860868c19d8c4b6 (diff)
[ARM] 4709/1: pxa: mmc: add 26MHz support for pxa3[0|1]0 mmc controller
pxa3[0|1]0 mmc controller can support 26MHz clock mode, they support SD spec 1.1 and MMC spec 4.0 which specify high speed mode. So host caps will include MMC_CAP_MMC_HIGHSPEED and MMC_CAP_SD_HIGHSPEED for pxa3[0|1]0. This patch is to add 26MHz support for them. pxa host clock will be set to 26MHz mode when the card supported max clock rate is higher than or equal to 26MHz. Signed-off-by: Bridge Wu <bridge.wu@marvell.com> Acked-by: Pierre Ossman <drzeus@drzeus.cx> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'drivers/mmc/host')
-rw-r--r--drivers/mmc/host/pxamci.c31
1 files changed, 22 insertions, 9 deletions
diff --git a/drivers/mmc/host/pxamci.c b/drivers/mmc/host/pxamci.c
index 1654a333034..80df4b047c8 100644
--- a/drivers/mmc/host/pxamci.c
+++ b/drivers/mmc/host/pxamci.c
@@ -375,14 +375,23 @@ static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
if (host->clkrt == CLKRT_OFF)
clk_enable(host->clk);
- /*
- * clk might result in a lower divisor than we
- * desire. check for that condition and adjust
- * as appropriate.
- */
- if (rate / clk > ios->clock)
- clk <<= 1;
- host->clkrt = fls(clk) - 1;
+ if (ios->clock == 26000000) {
+ /* to support 26MHz on pxa300/pxa310 */
+ host->clkrt = 7;
+ } else {
+ /* to handle (19.5MHz, 26MHz) */
+ if (!clk)
+ clk = 1;
+
+ /*
+ * clk might result in a lower divisor than we
+ * desire. check for that condition and adjust
+ * as appropriate.
+ */
+ if (rate / clk > ios->clock)
+ clk <<= 1;
+ host->clkrt = fls(clk) - 1;
+ }
/*
* we write clkrt on the next command
@@ -519,7 +528,8 @@ static int pxamci_probe(struct platform_device *pdev)
* Calculate minimum clock rate, rounding up.
*/
mmc->f_min = (host->clkrate + 63) / 64;
- mmc->f_max = host->clkrate;
+ mmc->f_max = (cpu_is_pxa300() || cpu_is_pxa310()) ? 26000000
+ : host->clkrate;
mmc->ocr_avail = host->pdata ?
host->pdata->ocr_mask :
@@ -529,6 +539,9 @@ static int pxamci_probe(struct platform_device *pdev)
if (!cpu_is_pxa21x() && !cpu_is_pxa25x()) {
mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;
host->cmdat |= CMDAT_SDIO_INT_EN;
+ if (cpu_is_pxa300() || cpu_is_pxa310())
+ mmc->caps |= MMC_CAP_MMC_HIGHSPEED |
+ MMC_CAP_SD_HIGHSPEED;
}
host->sg_cpu = dma_alloc_coherent(&pdev->dev, PAGE_SIZE, &host->sg_dma, GFP_KERNEL);