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authorAndy Fleming <afleming@freescale.com>2008-03-24 10:53:28 -0500
committerJeff Garzik <jeff@garzik.org>2008-03-26 00:44:47 -0400
commit2f4489112896770d66dc2960f71174d69ee23004 (patch)
treed91605f48735267a9c827ad1b7c1cc1324c2992d /drivers/net/gianfar.h
parent99da5003a5b085c12d996da1010e276e9b88672f (diff)
gianfar: Fix Rx/Tx HW interrupt coalescing counter reset procedure.
- Fix Rx/Tx HW interrupt coalescing counter reset logic. Disabling is required before resetting the counter. - Update the Default both Rx and Tx coalescing timer threshold. Formerly 4 is set which is equal to 1.5 frame at the line rate of 1GbE interface, and it doesn't match to the coalescing frame count which is set to 16. Threashold 21 is matched to frame count 16. Signed-off-by: Dai Haruki <dai.haruki@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/gianfar.h')
-rw-r--r--drivers/net/gianfar.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/gianfar.h b/drivers/net/gianfar.h
index fcfa1bd5728..ea8671f87bc 100644
--- a/drivers/net/gianfar.h
+++ b/drivers/net/gianfar.h
@@ -124,11 +124,11 @@ extern const char gfar_driver_version[];
#define DEFAULT_TX_COALESCE 1
#define DEFAULT_TXCOUNT 16
-#define DEFAULT_TXTIME 4
+#define DEFAULT_TXTIME 21
#define DEFAULT_RX_COALESCE 1
#define DEFAULT_RXCOUNT 16
-#define DEFAULT_RXTIME 4
+#define DEFAULT_RXTIME 21
#define TBIPA_VALUE 0x1f
#define MIIMCFG_INIT_VALUE 0x00000007