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authorJesse Brandeburg <jesse.brandeburg@intel.com>2008-08-26 04:27:27 -0700
committerJeff Garzik <jgarzik@redhat.com>2008-09-03 10:03:34 -0400
commitcc41ac7c0011703460dd4d4674bb7cbf73bb883d (patch)
tree9277eac7f33a3d44907b5321cbc1ba13835e12b7 /drivers/net/ixgbe/ixgbe_type.h
parente9990a9cd76a14905a8bf2348444ff775b24a92f (diff)
ixgbe: fix dca hints going to wrong processor
hardware was configured incorrectly which led all hints to be sent to queue[0]'s DCA configuration. Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'drivers/net/ixgbe/ixgbe_type.h')
-rw-r--r--drivers/net/ixgbe/ixgbe_type.h10
1 files changed, 4 insertions, 6 deletions
diff --git a/drivers/net/ixgbe/ixgbe_type.h b/drivers/net/ixgbe/ixgbe_type.h
index 85eb03cce25..3e9c483ad8e 100644
--- a/drivers/net/ixgbe/ixgbe_type.h
+++ b/drivers/net/ixgbe/ixgbe_type.h
@@ -356,12 +356,10 @@
#define IXGBE_ANLP2 0x042B4
#define IXGBE_ATLASCTL 0x04800
-/* RSCCTL Bit Masks */
-#define IXGBE_RSCCTL_RSCEN 0x01
-#define IXGBE_RSCCTL_MAXDESC_1 0x00
-#define IXGBE_RSCCTL_MAXDESC_4 0x04
-#define IXGBE_RSCCTL_MAXDESC_8 0x08
-#define IXGBE_RSCCTL_MAXDESC_16 0x0C
+/* RDRXCTL Bit Masks */
+#define IXGBE_RDRXCTL_RDMTS_1_2 0x00000000 /* Rx Desc Min Threshold Size */
+#define IXGBE_RDRXCTL_MVMEN 0x00000020
+#define IXGBE_RDRXCTL_DMAIDONE 0x00000008 /* DMA init cycle done */
/* CTRL Bit Masks */
#define IXGBE_CTRL_GIO_DIS 0x00000004 /* Global IO Master Disable bit */