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authorBen Hutchings <bhutchings@solarflare.com>2009-10-23 08:30:36 +0000
committerDavid S. Miller <davem@davemloft.net>2009-10-24 04:27:03 -0700
commit3e6c4538542ab2103ab7c01f4458bc2e21b672a1 (patch)
tree0ae49634fa3288704d6c5bf8e279909b52401734 /drivers/net/sfc/falcon_boards.c
parent625b451455cebb7120492766c8425b6e808fc209 (diff)
sfc: Update hardware definitions for Siena
Siena is still based on the Falcon hardware architecture and will share many of these definitions, so replace falcon_hwdefs.h with regs.h. The new definitions have been generated according to a naming convention which incorporates the type and revision information. Update the code accordingly. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/sfc/falcon_boards.c')
-rw-r--r--drivers/net/sfc/falcon_boards.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/net/sfc/falcon_boards.c b/drivers/net/sfc/falcon_boards.c
index ab940756ac7..68ca45c5d5d 100644
--- a/drivers/net/sfc/falcon_boards.c
+++ b/drivers/net/sfc/falcon_boards.c
@@ -13,7 +13,7 @@
#include "phy.h"
#include "efx.h"
#include "falcon.h"
-#include "falcon_hwdefs.h"
+#include "regs.h"
#include "falcon_io.h"
#include "workarounds.h"
@@ -332,14 +332,14 @@ static int sfn4111t_reset(struct efx_nic *efx)
* FLASH_CFG_1 strap (GPIO 3) appropriately. Only change the
* output enables; the output levels should always be 0 (low)
* and we rely on external pull-ups. */
- falcon_read(efx, &reg, GPIO_CTL_REG_KER);
- EFX_SET_OWORD_FIELD(reg, GPIO2_OEN, true);
- falcon_write(efx, &reg, GPIO_CTL_REG_KER);
+ falcon_read(efx, &reg, FR_AB_GPIO_CTL);
+ EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO2_OEN, true);
+ falcon_write(efx, &reg, FR_AB_GPIO_CTL);
msleep(1000);
- EFX_SET_OWORD_FIELD(reg, GPIO2_OEN, false);
- EFX_SET_OWORD_FIELD(reg, GPIO3_OEN,
+ EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO2_OEN, false);
+ EFX_SET_OWORD_FIELD(reg, FRF_AB_GPIO3_OEN,
!!(efx->phy_mode & PHY_MODE_SPECIAL));
- falcon_write(efx, &reg, GPIO_CTL_REG_KER);
+ falcon_write(efx, &reg, FR_AB_GPIO_CTL);
msleep(1);
mutex_unlock(&efx->i2c_adap.bus_lock);