diff options
| author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-02-07 19:32:36 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-02-07 19:32:36 -0800 |
| commit | 905adce4094d64a6691df994e424fbf486301adc (patch) | |
| tree | c4e3a2fb1465eeb713b3bec5ef4634c28179a14b /drivers/pci/quirks.c | |
| parent | 78149df6d565c36675463352d0bfe0000b02b7a7 (diff) | |
| parent | 1e8f34f7d88c969a06229a786241839d49dd63e3 (diff) | |
Merge master.kernel.org:/pub/scm/linux/kernel/git/bart/ide-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/bart/ide-2.6: (23 commits)
ide-acpi support warning fix
ACPI support for IDE devices
IDE Driver for Delkin/Lexar/etc.. cardbus CF adapter
ide: it8213 IDE driver update (version 2)
ide: add it8213 IDE driver
tc86c001: add missing __init tag for tc86c001_ide_init()
tc86c001: mark init_chipset_tc86c001() with __devinit tag
tc86c001: init_hwif_tc86c001() can be static
ide: add Toshiba TC86C001 IDE driver (take 2)
pdc202xx_new: remove check_in_drive_lists abomination
pdc202xx_new: remove useless code
slc90e66: carry over fixes from piix driver
piix: tuneproc() fixes/cleanups
piix: fix 82371MX enablebits
hpt366: HPT36x PCI clock detection fix
hpt366: init code rewrite
hpt366: clean up DMA timeout handling for HPT370
hpt366: merge HPT37x speedproc handlers
hpt366: cache channel's MCR address
hpt366: switch to using pci_get_slot
...
Diffstat (limited to 'drivers/pci/quirks.c')
| -rw-r--r-- | drivers/pci/quirks.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 0d0ba2fad5f..11217bda4b9 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -1460,6 +1460,24 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x2609, quirk_intel_pcie_pm); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x260a, quirk_intel_pcie_pm); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x260b, quirk_intel_pcie_pm); +/* + * Toshiba TC86C001 IDE controller reports the standard 8-byte BAR0 size + * but the PIO transfers won't work if BAR0 falls at the odd 8 bytes. + * Re-allocate the region if needed... + */ +static void __init quirk_tc86c001_ide(struct pci_dev *dev) +{ + struct resource *r = &dev->resource[0]; + + if (r->start & 0x8) { + r->start = 0; + r->end = 0xf; + } +} +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TOSHIBA_2, + PCI_DEVICE_ID_TOSHIBA_TC86C001_IDE, + quirk_tc86c001_ide); + static void __devinit quirk_netmos(struct pci_dev *dev) { unsigned int num_parallel = (dev->subsystem_device & 0xf0) >> 4; |