diff options
| author | Hannes Reinecke <hare@suse.de> | 2006-01-24 10:44:38 +0100 |
|---|---|---|
| committer | James Bottomley <jejb@mulgrave.(none)> | 2006-01-31 14:39:48 -0600 |
| commit | 3fb086126462c2de06dddaec58981d8827be100d (patch) | |
| tree | eaa3e79ef84f8a68246e0ba68a1d048b03e9acd4 /drivers/scsi/aic7xxx/aic79xx_osm.c | |
| parent | 53467e636b7beb350c307cc88323aae4676577f2 (diff) | |
[SCSI] aic79xx: SLOWCRC fix
This patch introduces the SLOWCRC handling for certain buggy chipsets.
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Diffstat (limited to 'drivers/scsi/aic7xxx/aic79xx_osm.c')
| -rw-r--r-- | drivers/scsi/aic7xxx/aic79xx_osm.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/drivers/scsi/aic7xxx/aic79xx_osm.c b/drivers/scsi/aic7xxx/aic79xx_osm.c index 2567e29960b..815c06312c8 100644 --- a/drivers/scsi/aic7xxx/aic79xx_osm.c +++ b/drivers/scsi/aic7xxx/aic79xx_osm.c @@ -314,6 +314,21 @@ static uint32_t aic79xx_seltime; */ uint32_t aic79xx_periodic_otag; +/* Some storage boxes are using an LSI chip which has a bug making it + * impossible to use aic79xx Rev B chip in 320 speeds. The following + * storage boxes have been reported to be buggy: + * EonStor 3U 16-Bay: U16U-G3A3 + * EonStor 2U 12-Bay: U12U-G3A3 + * SentinelRAID: 2500F R5 / R6 + * SentinelRAID: 2500F R1 + * SentinelRAID: 2500F/1500F + * SentinelRAID: 150F + * + * To get around this LSI bug, you can set your board to 160 mode + * or you can enable the SLOWCRC bit. + */ +uint32_t aic79xx_slowcrc; + /* * Module information and settable options. */ @@ -343,6 +358,7 @@ MODULE_PARM_DESC(aic79xx, " amplitude:<int> Set the signal amplitude (0-7).\n" " seltime:<int> Selection Timeout:\n" " (0/256ms,1/128ms,2/64ms,3/32ms)\n" +" slowcrc Turn on the SLOWCRC bit (Rev B only)\n" "\n" " Sample /etc/modprobe.conf line:\n" " Enable verbose logging\n" @@ -1003,6 +1019,7 @@ aic79xx_setup(char *s) { "slewrate", NULL }, { "precomp", NULL }, { "amplitude", NULL }, + { "slowcrc", &aic79xx_slowcrc }, }; end = strchr(s, '\0'); |