diff options
author | Ingo Molnar <mingo@elte.hu> | 2008-09-23 23:26:42 +0200 |
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committer | Ingo Molnar <mingo@elte.hu> | 2008-09-23 23:26:42 +0200 |
commit | 07bbc16a8676b06950a21f35b59f69b2fe763bbd (patch) | |
tree | f87fbfea747e9d92591c8d0a54db7c487e3c3d78 /drivers/serial/imx.c | |
parent | 6a9e91846bf52cc70a0417de19fdfac224c435c4 (diff) | |
parent | f8e256c687eb53850685747757c8d75e58756e15 (diff) |
Merge branch 'timers/urgent' into x86/xen
Conflicts:
arch/x86/kernel/process_32.c
arch/x86/kernel/process_64.c
Manual merge:
arch/x86/kernel/smpboot.c
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'drivers/serial/imx.c')
-rw-r--r-- | drivers/serial/imx.c | 27 |
1 files changed, 22 insertions, 5 deletions
diff --git a/drivers/serial/imx.c b/drivers/serial/imx.c index 6a29f9330a7..3f90f1bbbbc 100644 --- a/drivers/serial/imx.c +++ b/drivers/serial/imx.c @@ -127,8 +127,13 @@ #define UCR3_RXDSEN (1<<6) /* Receive status interrupt enable */ #define UCR3_AIRINTEN (1<<5) /* Async IR wake interrupt enable */ #define UCR3_AWAKEN (1<<4) /* Async wake interrupt enable */ -#define UCR3_REF25 (1<<3) /* Ref freq 25 MHz */ -#define UCR3_REF30 (1<<2) /* Ref Freq 30 MHz */ +#ifdef CONFIG_ARCH_IMX +#define UCR3_REF25 (1<<3) /* Ref freq 25 MHz, only on mx1 */ +#define UCR3_REF30 (1<<2) /* Ref Freq 30 MHz, only on mx1 */ +#endif +#if defined CONFIG_ARCH_MX2 || defined CONFIG_ARCH_MX3 +#define UCR3_RXDMUXSEL (1<<2) /* RXD Muxed Input Select, on mx2/mx3 */ +#endif #define UCR3_INVT (1<<1) /* Inverted Infrared transmission */ #define UCR3_BPEN (1<<0) /* Preset registers enable */ #define UCR4_CTSTL_32 (32<<10) /* CTS trigger level (32 chars) */ @@ -445,7 +450,7 @@ static irqreturn_t imx_int(int irq, void *dev_id) readl(sport->port.membase + UCR1) & UCR1_TXMPTYEN) imx_txint(irq, dev_id); - if (sts & USR1_RTSS) + if (sts & USR1_RTSD) imx_rtsint(irq, dev_id); return IRQ_HANDLED; @@ -598,6 +603,12 @@ static int imx_startup(struct uart_port *port) temp |= (UCR2_RXEN | UCR2_TXEN); writel(temp, sport->port.membase + UCR2); +#if defined CONFIG_ARCH_MX2 || defined CONFIG_ARCH_MX3 + temp = readl(sport->port.membase + UCR3); + temp |= UCR3_RXDMUXSEL; + writel(temp, sport->port.membase + UCR3); +#endif + /* * Enable modem status interrupts */ @@ -1133,13 +1144,19 @@ static int serial_imx_probe(struct platform_device *pdev) if(pdata && (pdata->flags & IMXUART_HAVE_RTSCTS)) sport->have_rtscts = 1; - if (pdata->init) - pdata->init(pdev); + if (pdata->init) { + ret = pdata->init(pdev); + if (ret) + goto clkput; + } uart_add_one_port(&imx_reg, &sport->port); platform_set_drvdata(pdev, &sport->port); return 0; +clkput: + clk_put(sport->clk); + clk_disable(sport->clk); unmap: iounmap(sport->port.membase); free: |