diff options
author | Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> | 2009-09-22 20:44:24 +0200 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2009-12-11 12:21:45 -0800 |
commit | e44fd1cfded0e42c681ad5419b1ceea600ead29d (patch) | |
tree | 4f6811b11a8cb4c79e40b887e083005336281186 /drivers/staging/rt2860/chip | |
parent | c3126b93b512c046340dfc4ab38beabd8084169f (diff) |
Staging: rt2860: add RT3090 chipset support
Add support for RT3090 chipset
(based on 2009_0612_RT3090_Linux_STA_V2.1.0.0_DPO).
Tested with RT2860.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/staging/rt2860/chip')
-rw-r--r-- | drivers/staging/rt2860/chip/mac_pci.h | 12 | ||||
-rw-r--r-- | drivers/staging/rt2860/chip/rt3090.h | 72 | ||||
-rw-r--r-- | drivers/staging/rt2860/chip/rtmp_phy.h | 183 |
3 files changed, 266 insertions, 1 deletions
diff --git a/drivers/staging/rt2860/chip/mac_pci.h b/drivers/staging/rt2860/chip/mac_pci.h index 9ca9c3602d6..61b3f82315a 100644 --- a/drivers/staging/rt2860/chip/mac_pci.h +++ b/drivers/staging/rt2860/chip/mac_pci.h @@ -133,6 +133,18 @@ typedef struct PACKED _RXD_STRUC{ UINT32 Rsv1:13; } RXD_STRUC, *PRXD_STRUC, RT28XX_RXD_STRUC, *PRT28XX_RXD_STRUC; +typedef union _TX_ATTENUATION_CTRL_STRUC { + struct + { + ULONG RF_ISOLATION_ENABLE:1; + ULONG Reserve2:7; + ULONG PCIE_PHY_TX_ATTEN_VALUE:3; + ULONG PCIE_PHY_TX_ATTEN_EN:1; + ULONG Reserve1:20; + } field; + + ULONG word; +} TX_ATTENUATION_CTRL_STRUC, *PTX_ATTENUATION_CTRL_STRUC; /* ----------------- EEPROM Related MACRO ----------------- */ diff --git a/drivers/staging/rt2860/chip/rt3090.h b/drivers/staging/rt2860/chip/rt3090.h new file mode 100644 index 00000000000..c2249a47123 --- /dev/null +++ b/drivers/staging/rt2860/chip/rt3090.h @@ -0,0 +1,72 @@ +/* + ************************************************************************* + * Ralink Tech Inc. + * 5F., No.36, Taiyuan St., Jhubei City, + * Hsinchu County 302, + * Taiwan, R.O.C. + * + * (c) Copyright 2002-2007, Ralink Technology, Inc. + * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + * * + ************************************************************************* + + Module Name: + rt3090.h + + Abstract: + + Revision History: + Who When What + --------- ---------- ---------------------------------------------- + */ + +#ifndef __RT3090_H__ +#define __RT3090_H__ + +#ifdef RT3090 + +#ifndef RTMP_PCI_SUPPORT +#error "For RT3090, you should define the compile flag -DRTMP_PCI_SUPPORT" +#endif + +#ifndef RTMP_MAC_PCI +#error "For RT3090, you should define the compile flag -DRTMP_MAC_PCI" +#endif + +#ifndef RTMP_RF_RW_SUPPORT +#error "For RT3090, you should define the compile flag -DRTMP_RF_RW_SUPPORT" +#endif + +#ifndef RT30xx +#error "For RT3090, you should define the compile flag -DRT30xx" +#endif + +#define PCIE_PS_SUPPORT + +#include "mac_pci.h" +#include "rt30xx.h" + +// +// Device ID & Vendor ID, these values should match EEPROM value +// +#define NIC3090_PCIe_DEVICE_ID 0x3090 // 1T/1R miniCard +#define NIC3091_PCIe_DEVICE_ID 0x3091 // 1T/2R miniCard +#define NIC3092_PCIe_DEVICE_ID 0x3092 // 2T/2R miniCard + +#endif // RT3090 // + +#endif //__RT3090_H__ // diff --git a/drivers/staging/rt2860/chip/rtmp_phy.h b/drivers/staging/rt2860/chip/rtmp_phy.h index b3326c603cc..87516f3a111 100644 --- a/drivers/staging/rt2860/chip/rtmp_phy.h +++ b/drivers/staging/rt2860/chip/rtmp_phy.h @@ -278,6 +278,7 @@ But for some chipset which didn't have mcu (e.g., RBUS based chipset), we will use this function too and didn't access the bbp register via the MCU. */ +#if 0 #define RTMP_BBP_IO_READ8_BY_REG_ID(_A, _I, _pV) \ do{ \ if ((_A)->bPCIclkOff == FALSE) \ @@ -288,7 +289,99 @@ RTMP_BBP_IO_READ8((_A), (_I), (_pV), TRUE); \ } \ }while(0) - +#else +// Read BBP register by register's ID. Generate PER to test BA +#define RTMP_BBP_IO_READ8_BY_REG_ID(_A, _I, _pV) \ +{ \ + BBP_CSR_CFG_STRUC BbpCsr; \ + int i, k; \ + BOOLEAN brc; \ + BbpCsr.field.Busy = IDLE; \ + if ((IS_RT3090((_A)) || IS_RT3572((_A)) || IS_RT3390((_A))) && ((_A)->StaCfg.PSControl.field.rt30xxPowerMode == 3) \ + && ((_A)->StaCfg.PSControl.field.EnableNewPS == TRUE) \ + && ((_A)->bPCIclkOff == FALSE) \ + && ((_A)->brt30xxBanMcuCmd == FALSE)) \ + { \ + for (i=0; i<MAX_BUSY_COUNT; i++) \ + { \ + RTMP_IO_READ32(_A, H2M_BBP_AGENT, &BbpCsr.word); \ + if (BbpCsr.field.Busy == BUSY) \ + { \ + continue; \ + } \ + BbpCsr.word = 0; \ + BbpCsr.field.fRead = 1; \ + BbpCsr.field.BBP_RW_MODE = 1; \ + BbpCsr.field.Busy = 1; \ + BbpCsr.field.RegNum = _I; \ + RTMP_IO_WRITE32(_A, H2M_BBP_AGENT, BbpCsr.word); \ + brc = AsicSendCommandToMcu(_A, 0x80, 0xff, 0x0, 0x0); \ + if (brc == TRUE) \ + { \ + for (k=0; k<MAX_BUSY_COUNT; k++) \ + { \ + RTMP_IO_READ32(_A, H2M_BBP_AGENT, &BbpCsr.word); \ + if (BbpCsr.field.Busy == IDLE) \ + break; \ + } \ + if ((BbpCsr.field.Busy == IDLE) && \ + (BbpCsr.field.RegNum == _I)) \ + { \ + *(_pV) = (UCHAR)BbpCsr.field.Value; \ + break; \ + } \ + } \ + else \ + { \ + BbpCsr.field.Busy = 0; \ + RTMP_IO_WRITE32(_A, H2M_BBP_AGENT, BbpCsr.word); \ + } \ + } \ + } \ + else if (!((IS_RT3090((_A)) || IS_RT3572((_A)) || IS_RT3390((_A))) && ((_A)->StaCfg.PSControl.field.rt30xxPowerMode == 3) \ + && ((_A)->StaCfg.PSControl.field.EnableNewPS == TRUE)) \ + && ((_A)->bPCIclkOff == FALSE)) \ + { \ + for (i=0; i<MAX_BUSY_COUNT; i++) \ + { \ + RTMP_IO_READ32(_A, H2M_BBP_AGENT, &BbpCsr.word); \ + if (BbpCsr.field.Busy == BUSY) \ + { \ + continue; \ + } \ + BbpCsr.word = 0; \ + BbpCsr.field.fRead = 1; \ + BbpCsr.field.BBP_RW_MODE = 1; \ + BbpCsr.field.Busy = 1; \ + BbpCsr.field.RegNum = _I; \ + RTMP_IO_WRITE32(_A, H2M_BBP_AGENT, BbpCsr.word); \ + AsicSendCommandToMcu(_A, 0x80, 0xff, 0x0, 0x0); \ + for (k=0; k<MAX_BUSY_COUNT; k++) \ + { \ + RTMP_IO_READ32(_A, H2M_BBP_AGENT, &BbpCsr.word); \ + if (BbpCsr.field.Busy == IDLE) \ + break; \ + } \ + if ((BbpCsr.field.Busy == IDLE) && \ + (BbpCsr.field.RegNum == _I)) \ + { \ + *(_pV) = (UCHAR)BbpCsr.field.Value; \ + break; \ + } \ + } \ + } \ + else \ + { \ + DBGPRINT_ERR((" , brt30xxBanMcuCmd = %d, Read BBP %d \n", (_A)->brt30xxBanMcuCmd, (_I))); \ + *(_pV) = (_A)->BbpWriteLatch[_I]; \ + } \ + if ((BbpCsr.field.Busy == BUSY) || ((_A)->bPCIclkOff == TRUE)) \ + { \ + DBGPRINT_ERR(("BBP read R%d=0x%x fail\n", _I, BbpCsr.word)); \ + *(_pV) = (_A)->BbpWriteLatch[_I]; \ + } \ +} +#endif // 0 // /* basic marco for BBP write operation. @@ -348,6 +441,7 @@ But for some chipset which didn't have mcu (e.g., RBUS based chipset), we will use this function too and didn't access the bbp register via the MCU. */ +#if 0 #define RTMP_BBP_IO_WRITE8_BY_REG_ID(_A, _I, _pV) \ do{ \ if ((_A)->bPCIclkOff == FALSE) \ @@ -358,6 +452,93 @@ RTMP_BBP_IO_WRITE8((_A), (_I), (_pV), TRUE); \ } \ }while(0) +#else +// Write BBP register by register's ID & value +#define RTMP_BBP_IO_WRITE8_BY_REG_ID(_A, _I, _V) \ +{ \ + BBP_CSR_CFG_STRUC BbpCsr; \ + INT BusyCnt = 0; \ + BOOLEAN brc; \ + if (_I < MAX_NUM_OF_BBP_LATCH) \ + { \ + if ((IS_RT3090((_A)) || IS_RT3572((_A)) || IS_RT3390((_A))) && ((_A)->StaCfg.PSControl.field.rt30xxPowerMode == 3) \ + && ((_A)->StaCfg.PSControl.field.EnableNewPS == TRUE) \ + && ((_A)->bPCIclkOff == FALSE) \ + && ((_A)->brt30xxBanMcuCmd == FALSE)) \ + { \ + if (_A->AccessBBPFailCount > 20) \ + { \ + AsicResetBBPAgent(_A); \ + _A->AccessBBPFailCount = 0; \ + } \ + for (BusyCnt=0; BusyCnt<MAX_BUSY_COUNT; BusyCnt++) \ + { \ + RTMP_IO_READ32(_A, H2M_BBP_AGENT, &BbpCsr.word); \ + if (BbpCsr.field.Busy == BUSY) \ + continue; \ + BbpCsr.word = 0; \ + BbpCsr.field.fRead = 0; \ + BbpCsr.field.BBP_RW_MODE = 1; \ + BbpCsr.field.Busy = 1; \ + BbpCsr.field.Value = _V; \ + BbpCsr.field.RegNum = _I; \ + RTMP_IO_WRITE32(_A, H2M_BBP_AGENT, BbpCsr.word); \ + brc = AsicSendCommandToMcu(_A, 0x80, 0xff, 0x0, 0x0); \ + if (brc == TRUE) \ + { \ + (_A)->BbpWriteLatch[_I] = _V; \ + } \ + else \ + { \ + BbpCsr.field.Busy = 0; \ + RTMP_IO_WRITE32(_A, H2M_BBP_AGENT, BbpCsr.word); \ + } \ + break; \ + } \ + } \ + else if (!((IS_RT3090((_A)) || IS_RT3572((_A)) || IS_RT3390((_A))) && ((_A)->StaCfg.PSControl.field.rt30xxPowerMode == 3) \ + && ((_A)->StaCfg.PSControl.field.EnableNewPS == TRUE)) \ + && ((_A)->bPCIclkOff == FALSE)) \ + { \ + if (_A->AccessBBPFailCount > 20) \ + { \ + AsicResetBBPAgent(_A); \ + _A->AccessBBPFailCount = 0; \ + } \ + for (BusyCnt=0; BusyCnt<MAX_BUSY_COUNT; BusyCnt++) \ + { \ + RTMP_IO_READ32(_A, H2M_BBP_AGENT, &BbpCsr.word); \ + if (BbpCsr.field.Busy == BUSY) \ + continue; \ + BbpCsr.word = 0; \ + BbpCsr.field.fRead = 0; \ + BbpCsr.field.BBP_RW_MODE = 1; \ + BbpCsr.field.Busy = 1; \ + BbpCsr.field.Value = _V; \ + BbpCsr.field.RegNum = _I; \ + RTMP_IO_WRITE32(_A, H2M_BBP_AGENT, BbpCsr.word); \ + AsicSendCommandToMcu(_A, 0x80, 0xff, 0x0, 0x0); \ + (_A)->BbpWriteLatch[_I] = _V; \ + break; \ + } \ + } \ + else \ + { \ + DBGPRINT_ERR((" brt30xxBanMcuCmd = %d. Write BBP %d \n", (_A)->brt30xxBanMcuCmd, (_I))); \ + } \ + if ((BusyCnt == MAX_BUSY_COUNT) || ((_A)->bPCIclkOff == TRUE)) \ + { \ + if (BusyCnt == MAX_BUSY_COUNT) \ + (_A)->AccessBBPFailCount++; \ + DBGPRINT_ERR(("BBP write R%d=0x%x fail. BusyCnt= %d.bPCIclkOff = %d. \n", _I, BbpCsr.word, BusyCnt, (_A)->bPCIclkOff )); \ + } \ + } \ + else \ + { \ + DBGPRINT_ERR(("****** BBP_Write_Latch Buffer exceeds max boundry ****** \n")); \ + } \ +} +#endif // 0 // #endif // RTMP_MAC_PCI // #ifdef RTMP_MAC_USB |