diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-09-24 21:22:33 +0100 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-09-24 21:22:33 +0100 |
commit | baea7b946f00a291b166ccae7fcfed6c01530cc6 (patch) | |
tree | 4aa275fbdbec9c7b9b4629e8bee2bbecd3c6a6af /drivers/video/via/viamode.c | |
parent | ae19ffbadc1b2100285a5b5b3d0a4e0a11390904 (diff) | |
parent | 94e0fb086fc5663c38bbc0fe86d698be8314f82f (diff) |
Merge branch 'origin' into for-linus
Conflicts:
MAINTAINERS
Diffstat (limited to 'drivers/video/via/viamode.c')
-rw-r--r-- | drivers/video/via/viamode.c | 100 |
1 files changed, 43 insertions, 57 deletions
diff --git a/drivers/video/via/viamode.c b/drivers/video/via/viamode.c index 6dcf583a837..b74f8a67923 100644 --- a/drivers/video/via/viamode.c +++ b/drivers/video/via/viamode.c @@ -100,12 +100,8 @@ struct io_reg CN400_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01}, {VIACR, CR0F, 0xFF, 0x00}, /* Cursor Localtion Low */ {VIACR, CR32, 0xFF, 0x00}, {VIACR, CR33, 0xFF, 0x00}, -{VIACR, CR34, 0xFF, 0x00}, {VIACR, CR35, 0xFF, 0x00}, {VIACR, CR36, 0x08, 0x00}, -{VIACR, CR62, 0xFF, 0x00}, /* Secondary Display Starting Address */ -{VIACR, CR63, 0xFF, 0x00}, /* Secondary Display Starting Address */ -{VIACR, CR64, 0xFF, 0x00}, /* Secondary Display Starting Address */ {VIACR, CR69, 0xFF, 0x00}, {VIACR, CR6A, 0xFF, 0x40}, {VIACR, CR6B, 0xFF, 0x00}, @@ -159,16 +155,12 @@ struct io_reg CN700_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01}, {VIASR, CR30, 0xFF, 0x04}, {VIACR, CR32, 0xFF, 0x00}, {VIACR, CR33, 0x7F, 0x00}, -{VIACR, CR34, 0xFF, 0x00}, {VIACR, CR35, 0xFF, 0x00}, {VIACR, CR36, 0xFF, 0x31}, {VIACR, CR41, 0xFF, 0x80}, {VIACR, CR42, 0xFF, 0x00}, {VIACR, CR55, 0x80, 0x00}, {VIACR, CR5D, 0x80, 0x00}, /*Horizontal Retrace Start bit[11] should be 0*/ -{VIACR, CR62, 0xFF, 0x00}, /* Secondary Display Starting Address */ -{VIACR, CR63, 0xFF, 0x00}, /* Secondary Display Starting Address */ -{VIACR, CR64, 0xFF, 0x00}, /* Secondary Display Starting Address */ {VIACR, CR68, 0xFF, 0x67}, /* Default FIFO For IGA2 */ {VIACR, CR69, 0xFF, 0x00}, {VIACR, CR6A, 0xFD, 0x40}, @@ -233,9 +225,6 @@ struct io_reg KM400_ModeXregs[] = { {VIACR, CR55, 0x80, 0x00}, {VIACR, CR5D, 0x80, 0x00}, {VIACR, CR36, 0xFF, 0x01}, /* Power Mangement 3 */ - {VIACR, CR62, 0xFF, 0x00}, /* Secondary Display Starting Address */ - {VIACR, CR63, 0xFF, 0x00}, /* Secondary Display Starting Address */ - {VIACR, CR64, 0xFF, 0x00}, /* Secondary Display Starting Address */ {VIACR, CR68, 0xFF, 0x67}, /* Default FIFO For IGA2 */ {VIACR, CR6A, 0x20, 0x20}, /* Extended FIFO On */ {VIACR, CR7A, 0xFF, 0x01}, /* LCD Scaling Parameter 1 */ @@ -285,14 +274,9 @@ struct io_reg CX700_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01}, {VIACR, CR0F, 0xFF, 0x00}, /* Cursor Localtion Low */ {VIACR, CR32, 0xFF, 0x00}, {VIACR, CR33, 0xFF, 0x00}, -{VIACR, CR34, 0xFF, 0x00}, {VIACR, CR35, 0xFF, 0x00}, {VIACR, CR36, 0x08, 0x00}, {VIACR, CR47, 0xC8, 0x00}, /* Clear VCK Plus. */ -{VIACR, CR62, 0xFF, 0x00}, /* Secondary Display Starting Address */ -{VIACR, CR63, 0xFF, 0x00}, /* Secondary Display Starting Address */ -{VIACR, CR64, 0xFF, 0x00}, /* Secondary Display Starting Address */ -{VIACR, CRA3, 0xFF, 0x00}, /* Secondary Display Starting Address */ {VIACR, CR69, 0xFF, 0x00}, {VIACR, CR6A, 0xFF, 0x40}, {VIACR, CR6B, 0xFF, 0x00}, @@ -325,69 +309,61 @@ struct io_reg CX700_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01}, {VIACR, CR96, 0xFF, 0x00}, {VIACR, CR97, 0xFF, 0x00}, {VIACR, CR99, 0xFF, 0x00}, -{VIACR, CR9B, 0xFF, 0x00}, -{VIACR, CRD2, 0xFF, 0xFF} /* TMDS/LVDS control register. */ +{VIACR, CR9B, 0xFF, 0x00} }; -/* For VT3353: Common Setting for Video Mode */ -struct io_reg VX800_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01}, +struct io_reg VX855_ModeXregs[] = { +{VIASR, SR10, 0xFF, 0x01}, {VIASR, SR15, 0x02, 0x02}, {VIASR, SR16, 0xBF, 0x08}, {VIASR, SR17, 0xFF, 0x1F}, {VIASR, SR18, 0xFF, 0x4E}, {VIASR, SR1A, 0xFB, 0x08}, {VIASR, SR1B, 0xFF, 0xF0}, -{VIASR, SR1E, 0xFF, 0x01}, -{VIASR, SR2A, 0xFF, 0x00}, +{VIASR, SR1E, 0x07, 0x01}, +{VIASR, SR2A, 0xF0, 0x00}, +{VIASR, SR58, 0xFF, 0x00}, +{VIASR, SR59, 0xFF, 0x00}, {VIASR, SR2D, 0xFF, 0xFF}, /* VCK and LCK PLL power on. */ +{VIACR, CR09, 0xFF, 0x00}, /* Initial CR09=0*/ +{VIACR, CR11, 0x8F, 0x00}, /* IGA1 initial Vertical end */ +{VIACR, CR17, 0x7F, 0x00}, /* IGA1 CRT Mode control init */ {VIACR, CR0A, 0xFF, 0x1E}, /* Cursor Start */ {VIACR, CR0B, 0xFF, 0x00}, /* Cursor End */ {VIACR, CR0E, 0xFF, 0x00}, /* Cursor Location High */ {VIACR, CR0F, 0xFF, 0x00}, /* Cursor Localtion Low */ {VIACR, CR32, 0xFF, 0x00}, -{VIACR, CR33, 0xFF, 0x00}, -{VIACR, CR34, 0xFF, 0x00}, +{VIACR, CR33, 0x7F, 0x00}, {VIACR, CR35, 0xFF, 0x00}, {VIACR, CR36, 0x08, 0x00}, -{VIACR, CR47, 0xC8, 0x00}, /* Clear VCK Plus. */ -{VIACR, CR62, 0xFF, 0x00}, /* Secondary Display Starting Address */ -{VIACR, CR63, 0xFF, 0x00}, /* Secondary Display Starting Address */ -{VIACR, CR64, 0xFF, 0x00}, /* Secondary Display Starting Address */ -{VIACR, CRA3, 0xFF, 0x00}, /* Secondary Display Starting Address */ {VIACR, CR69, 0xFF, 0x00}, -{VIACR, CR6A, 0xFF, 0x40}, +{VIACR, CR6A, 0xFD, 0x60}, {VIACR, CR6B, 0xFF, 0x00}, {VIACR, CR6C, 0xFF, 0x00}, -{VIACR, CR7A, 0xFF, 0x01}, /* LCD Scaling Parameter 1 */ -{VIACR, CR7B, 0xFF, 0x02}, /* LCD Scaling Parameter 2 */ -{VIACR, CR7C, 0xFF, 0x03}, /* LCD Scaling Parameter 3 */ -{VIACR, CR7D, 0xFF, 0x04}, /* LCD Scaling Parameter 4 */ -{VIACR, CR7E, 0xFF, 0x07}, /* LCD Scaling Parameter 5 */ -{VIACR, CR7F, 0xFF, 0x0A}, /* LCD Scaling Parameter 6 */ -{VIACR, CR80, 0xFF, 0x0D}, /* LCD Scaling Parameter 7 */ -{VIACR, CR81, 0xFF, 0x13}, /* LCD Scaling Parameter 8 */ -{VIACR, CR82, 0xFF, 0x16}, /* LCD Scaling Parameter 9 */ -{VIACR, CR83, 0xFF, 0x19}, /* LCD Scaling Parameter 10 */ -{VIACR, CR84, 0xFF, 0x1C}, /* LCD Scaling Parameter 11 */ -{VIACR, CR85, 0xFF, 0x1D}, /* LCD Scaling Parameter 12 */ -{VIACR, CR86, 0xFF, 0x1E}, /* LCD Scaling Parameter 13 */ -{VIACR, CR87, 0xFF, 0x1F}, /* LCD Scaling Parameter 14 */ -{VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */ -{VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */ -{VIACR, CR8A, 0xFF, 0x88}, /* LCD Timing Control 1 */ -{VIACR, CRD4, 0xFF, 0x81}, /* Second power sequence control */ -{VIACR, CR8B, 0xFF, 0x5D}, /* LCD Power Sequence Control 0 */ -{VIACR, CR8C, 0xFF, 0x2B}, /* LCD Power Sequence Control 1 */ -{VIACR, CR8D, 0xFF, 0x6F}, /* LCD Power Sequence Control 2 */ -{VIACR, CR8E, 0xFF, 0x2B}, /* LCD Power Sequence Control 3 */ -{VIACR, CR8F, 0xFF, 0x01}, /* LCD Power Sequence Control 4 */ -{VIACR, CR90, 0xFF, 0x01}, /* LCD Power Sequence Control 5 */ -{VIACR, CR91, 0xFF, 0x80}, /* 24/12 bit LVDS Data off */ +{VIACR, CR7A, 0xFF, 0x01}, /* LCD Scaling Parameter 1 */ +{VIACR, CR7B, 0xFF, 0x02}, /* LCD Scaling Parameter 2 */ +{VIACR, CR7C, 0xFF, 0x03}, /* LCD Scaling Parameter 3 */ +{VIACR, CR7D, 0xFF, 0x04}, /* LCD Scaling Parameter 4 */ +{VIACR, CR7E, 0xFF, 0x07}, /* LCD Scaling Parameter 5 */ +{VIACR, CR7F, 0xFF, 0x0A}, /* LCD Scaling Parameter 6 */ +{VIACR, CR80, 0xFF, 0x0D}, /* LCD Scaling Parameter 7 */ +{VIACR, CR81, 0xFF, 0x13}, /* LCD Scaling Parameter 8 */ +{VIACR, CR82, 0xFF, 0x16}, /* LCD Scaling Parameter 9 */ +{VIACR, CR83, 0xFF, 0x19}, /* LCD Scaling Parameter 10 */ +{VIACR, CR84, 0xFF, 0x1C}, /* LCD Scaling Parameter 11 */ +{VIACR, CR85, 0xFF, 0x1D}, /* LCD Scaling Parameter 12 */ +{VIACR, CR86, 0xFF, 0x1E}, /* LCD Scaling Parameter 13 */ +{VIACR, CR87, 0xFF, 0x1F}, /* LCD Scaling Parameter 14 */ +{VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */ +{VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */ +{VIACR, CR8A, 0xFF, 0x88}, /* LCD Timing Control 1 */ +{VIACR, CRD4, 0xFF, 0x81}, /* Second power sequence control */ +{VIACR, CR91, 0xFF, 0x80}, /* 24/12 bit LVDS Data off */ {VIACR, CR96, 0xFF, 0x00}, {VIACR, CR97, 0xFF, 0x00}, {VIACR, CR99, 0xFF, 0x00}, {VIACR, CR9B, 0xFF, 0x00}, -{VIACR, CRD2, 0xFF, 0xFF} /* TMDS/LVDS control register. */ +{VIACR, CRD2, 0xFF, 0xFF} /* TMDS/LVDS control register. */ }; /* Video Mode Table */ @@ -401,7 +377,6 @@ struct io_reg CLE266_ModeXregs[] = { {VIASR, SR1E, 0xF0, 0x00}, {VIASR, SR1A, 0xFB, 0x08}, {VIACR, CR32, 0xFF, 0x00}, -{VIACR, CR34, 0xFF, 0x00}, {VIACR, CR35, 0xFF, 0x00}, {VIACR, CR36, 0x08, 0x00}, {VIACR, CR6A, 0xFF, 0x80}, @@ -1084,3 +1059,14 @@ struct VideoModeTable CEA_HDMI_Modes[] = { {VIA_RES_1280X720, CEAM1280x720, ARRAY_SIZE(CEAM1280x720)}, {VIA_RES_1920X1080, CEAM1920x1080, ARRAY_SIZE(CEAM1920x1080)} }; + +int NUM_TOTAL_RES_MAP_REFRESH = ARRAY_SIZE(res_map_refresh_tbl); +int NUM_TOTAL_CEA_MODES = ARRAY_SIZE(CEA_HDMI_Modes); +int NUM_TOTAL_CN400_ModeXregs = ARRAY_SIZE(CN400_ModeXregs); +int NUM_TOTAL_CN700_ModeXregs = ARRAY_SIZE(CN700_ModeXregs); +int NUM_TOTAL_KM400_ModeXregs = ARRAY_SIZE(KM400_ModeXregs); +int NUM_TOTAL_CX700_ModeXregs = ARRAY_SIZE(CX700_ModeXregs); +int NUM_TOTAL_VX855_ModeXregs = ARRAY_SIZE(VX855_ModeXregs); +int NUM_TOTAL_CLE266_ModeXregs = ARRAY_SIZE(CLE266_ModeXregs); +int NUM_TOTAL_PATCH_MODE = ARRAY_SIZE(res_patch_table); +int NUM_TOTAL_MODETABLE = ARRAY_SIZE(CLE266Modes); |