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authorThomas White <taw@bitwiz.org.uk>2009-11-15 02:02:31 +0100
committerThomas White <taw@bitwiz.org.uk>2009-11-15 14:25:26 +0100
commit01e4e0c2a1c39d7e4556f8996f21dfaf73b2869c (patch)
tree48c19aedc3c5788a5fd414b1e933cb1d23e4a9d8 /drivers
parentc492dbbc420549a71cce8b0a8aea48c4a2c0e774 (diff)
Enable FIFO stage for the LCD engine's memory access
By avoiding conflicts of memory access inside Glamo, this doubles the speed of internal memory access. Signed-off-by: Thomas White <taw@bitwiz.org.uk>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mfd/glamo/glamo-display.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mfd/glamo/glamo-display.c b/drivers/mfd/glamo/glamo-display.c
index f3bab3a4e8d..8c9ece4d12b 100644
--- a/drivers/mfd/glamo/glamo-display.c
+++ b/drivers/mfd/glamo/glamo-display.c
@@ -391,7 +391,7 @@ static void glamo_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
addr = GLAMO_OFFSET_FB + gobj->block->start;
addr_low = addr & 0xffff;
- addr_high = (addr >> 16) & 0x7f;
+ addr_high = ((addr >> 16) & 0x7f) | 0x4000;
glamo_lcd_cmd_mode(gdrm, 1);
reg_write_lcd(gdrm, GLAMO_REG_LCD_A_BASE1, addr_low);