meddle-wsod.patch

Signed-off-by: Andy Green <andy@openmoko.com>

4 files changed, 85 insertions, 5 deletions

diff --git a/drivers/mfd/glamo/glamo-core.c b/drivers/mfd/glamo/glamo-core.c
index 5241dd09d2b..140cd984778 100644
--- a/drivers/mfd/glamo/glamo-core.c
+++ b/drivers/mfd/glamo/glamo-core.c
@@ -888,7 +888,7 @@ static struct glamo_script glamo_init_script[] = {
 	{ GLAMO_REG_MEM_DRAM2,		0x01d6 },
 	{ GLAMO_REG_CLOCK_MEMORY,	0x000b },
 };
-
+#if 0
 static struct glamo_script glamo_resume_script[] = {
 
 	{ GLAMO_REG_PLL_GEN1,		0x05db },	/* 48MHz */
@@ -914,7 +914,7 @@ static struct glamo_script glamo_resume_script[] = {
 	{ GLAMO_REG_MEM_DRAM2,		0x01d6 },
 	{ GLAMO_REG_CLOCK_MEMORY,	0x000b },
 };
-
+#endif
 
 enum glamo_power {
 	GLAMO_POWER_ON,
@@ -925,7 +925,6 @@ static void glamo_power(struct glamo_core *glamo,
 			enum glamo_power new_state)
 {
 	int n;
-	int ads;
 	unsigned long flags;
 	
 	spin_lock_irqsave(&glamo->lock, flags);
diff --git a/drivers/mfd/glamo/glamo-core.h b/drivers/mfd/glamo/glamo-core.h
index 4ba909ccb15..0705204c6bb 100644
--- a/drivers/mfd/glamo/glamo-core.h
+++ b/drivers/mfd/glamo/glamo-core.h
@@ -2,7 +2,6 @@
 #define __GLAMO_CORE_H
 
 #include <asm/system.h>
-#include <linux/resume-dependency.h>
 
 /* for the time being, we put the on-screen framebuffer into the lowest
  * VRAM space.  This should make the code easily compatible with the various
diff --git a/drivers/mfd/glamo/glamo-gpio.c b/drivers/mfd/glamo/glamo-gpio.c
index 45d0bf91268..0a4c5a11ebe 100644
--- a/drivers/mfd/glamo/glamo-gpio.c
+++ b/drivers/mfd/glamo/glamo-gpio.c
@@ -37,6 +37,8 @@ void glamo_gpio_cfgpin(struct glamo_core *glamo, unsigned int pinfunc)
 	unsigned int reg = REG_OF_GPIO(pinfunc);
 	u_int16_t tmp;
 
+	printk(KERN_INFO "glamo_gpio_cfgpin 0x%x %p\n", pinfunc, glamo->base + reg);
+
 	spin_lock(&glamo->lock);
 	tmp = readw(glamo->base + reg);
 
diff --git a/drivers/video/display/jbt6k74.c b/drivers/video/display/jbt6k74.c
index 77f9528ff5a..754ac02213b 100644
--- a/drivers/video/display/jbt6k74.c
+++ b/drivers/video/display/jbt6k74.c
@@ -533,10 +533,51 @@ static ssize_t gamma_write(struct device *dev, struct device_attribute *attr,
 	return count;
 }
 
+static ssize_t reset_write(struct device *dev, struct device_attribute *attr,
+			   const char *buf, size_t count)
+{
+	struct jbt_info *jbt = dev_get_drvdata(dev);
+	struct jbt6k74_platform_data *jbt6k74_pdata = jbt->spi_dev->dev.platform_data;
+	int rc;
+
+	dev_info(dev, "**** jbt6k74 reset\n");
+
+	/* hard reset the jbt6k74 */
+
+	(jbt6k74_pdata->reset)(0, 0);
+	mdelay(1);
+	(jbt6k74_pdata->reset)(0, 1);
+	mdelay(120);
+
+	rc = jbt_reg_write_nodata(jbt, 0x01);
+	if (rc < 0)
+		dev_err(dev, "cannot soft reset\n");
+
+	mdelay(120);
+
+	jbt->state = JBT_STATE_DEEP_STANDBY;
+
+	switch (jbt->last_state) {
+	case JBT_STATE_QVGA_NORMAL:
+		jbt6k74_enter_state(jbt, JBT_STATE_QVGA_NORMAL);
+		break;
+	default:
+		jbt6k74_enter_state(jbt, JBT_STATE_NORMAL);
+		break;
+	}
+
+	rc = jbt6k74_display_onoff(jbt, 1);
+	if (rc < 0)
+		dev_err(dev, "cannot switch display on\n");
+
+	return count;
+}
+
 static DEVICE_ATTR(gamma_fine1, 0644, gamma_read, gamma_write);
 static DEVICE_ATTR(gamma_fine2, 0644, gamma_read, gamma_write);
 static DEVICE_ATTR(gamma_inclination, 0644, gamma_read, gamma_write);
 static DEVICE_ATTR(gamma_blue_offset, 0644, gamma_read, gamma_write);
+static DEVICE_ATTR(reset, 0600, NULL, reset_write);
 
 static struct attribute *jbt_sysfs_entries[] = {
 	&dev_attr_state.attr,
@@ -544,6 +585,7 @@ static struct attribute *jbt_sysfs_entries[] = {
 	&dev_attr_gamma_fine2.attr,
 	&dev_attr_gamma_inclination.attr,
 	&dev_attr_gamma_blue_offset.attr,
+	&dev_attr_reset.attr,
 	NULL,
 };
 
@@ -592,6 +634,7 @@ static int __devinit jbt_probe(struct spi_device *spi)
 {
 	int rc;
 	struct jbt_info *jbt;
+	struct jbt6k74_platform_data *jbt6k74_pdata = spi->dev.platform_data;
 
 	/* the controller doesn't have a MISO pin; we can't do detection */
 
@@ -615,6 +658,20 @@ static int __devinit jbt_probe(struct spi_device *spi)
 
 	dev_set_drvdata(&spi->dev, jbt);
 
+	/* hard reset the jbt6k74 */
+
+	(jbt6k74_pdata->reset)(0, 0);
+	mdelay(1);
+	(jbt6k74_pdata->reset)(0, 1);
+	mdelay(120);
+
+	rc = jbt_reg_write_nodata(jbt, 0x01);
+	if (rc < 0)
+		dev_err(&spi->dev, "cannot soft reset\n");
+
+	mdelay(120);
+
+
 	rc = jbt6k74_enter_state(jbt, JBT_STATE_NORMAL);
 	if (rc < 0) {
 		dev_err(&spi->dev, "cannot enter NORMAL state\n");
@@ -691,7 +748,25 @@ int jbt6k74_resume(struct spi_device *spi)
 {
 	struct jbt_info *jbt = dev_get_drvdata(&spi->dev);
 	struct jbt6k74_platform_data *jbt6k74_pdata = spi->dev.platform_data;
+	int rc;
 
+	dev_info(&spi->dev, "**** jbt6k74 resume start\n");
+
+	/* hard reset the jbt6k74 */
+
+	(jbt6k74_pdata->reset)(0, 0);
+	mdelay(1);
+	(jbt6k74_pdata->reset)(0, 1);
+	mdelay(120);
+
+	rc = jbt_reg_write_nodata(jbt, 0x01);
+	if (rc < 0)
+		dev_err(&spi->dev, "cannot soft reset\n");
+
+	mdelay(120);
+
+	jbt->state = JBT_STATE_DEEP_STANDBY;
+	
 	switch (jbt->last_state) {
 	case JBT_STATE_QVGA_NORMAL:
 		jbt6k74_enter_state(jbt, JBT_STATE_QVGA_NORMAL);
@@ -700,11 +775,16 @@ int jbt6k74_resume(struct spi_device *spi)
 		jbt6k74_enter_state(jbt, JBT_STATE_NORMAL);
 		break;
 	}
-	jbt6k74_display_onoff(jbt, 1);
+
+	rc = jbt6k74_display_onoff(jbt, 1);
+	if (rc < 0)
+		dev_err(&spi->dev, "cannot switch display on\n");
 
 	if (jbt6k74_pdata->resuming)
 		(jbt6k74_pdata->resuming)(0);
 
+	dev_info(&spi->dev, "**** jbt6k74 resume end\n");
+
 	return 0;
 }
 EXPORT_SYMBOL_GPL(jbt6k74_resume);