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authorPhilipp Zabel <philipp.zabel@gmail.com>2008-02-04 22:28:22 -0800
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2008-02-05 09:44:13 -0800
commit1c44f5f16fee880b294f8068354bfb9dddf1349b (patch)
treedd9815cf7a38af7d4abc55eb707574ceedd8a912 /include/asm-arm/arch-pxa/pxa-regs.h
parent7c2db759ece63fd166cf0849b7b271589fa1b754 (diff)
gpiolib support for the PXA architecture
This adds gpiolib support for the PXA architecture: - move all GPIO API functions from generic.c into gpio.c - convert the gpio_get/set_value macros into inline functions This makes it easier to hook up GPIOs provided by external chips like ASICs and CPLDs. Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Jean Delvare <khali@linux-fr.org> Cc: Eric Miao <eric.miao@marvell.com> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Haavard Skinnemoen <hskinnemoen@atmel.com> Cc: Ben Gardner <bgardner@wabtec.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> [ Minor ARM fixup from David Brownell folded into this ] Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'include/asm-arm/arch-pxa/pxa-regs.h')
-rw-r--r--include/asm-arm/arch-pxa/pxa-regs.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index 16ed24dbda4..ac175b4d10c 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -1131,6 +1131,19 @@
* General Purpose I/O
*/
+#define GPIO0_BASE ((void __iomem *)io_p2v(0x40E00000))
+#define GPIO1_BASE ((void __iomem *)io_p2v(0x40E00004))
+#define GPIO2_BASE ((void __iomem *)io_p2v(0x40E00008))
+#define GPIO3_BASE ((void __iomem *)io_p2v(0x40E00100))
+
+#define GPLR_OFFSET 0x00
+#define GPDR_OFFSET 0x0C
+#define GPSR_OFFSET 0x18
+#define GPCR_OFFSET 0x24
+#define GRER_OFFSET 0x30
+#define GFER_OFFSET 0x3C
+#define GEDR_OFFSET 0x48
+
#define GPLR0 __REG(0x40E00000) /* GPIO Pin-Level Register GPIO<31:0> */
#define GPLR1 __REG(0x40E00004) /* GPIO Pin-Level Register GPIO<63:32> */
#define GPLR2 __REG(0x40E00008) /* GPIO Pin-Level Register GPIO<80:64> */