diff options
| author | Catalin Marinas <catalin.marinas@arm.com> | 2007-02-14 19:18:09 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-02-15 14:51:21 +0000 |
| commit | 3edf22ab34e1fdffc8c0c7c7b7da4d0aebdba118 (patch) | |
| tree | ded29b4b8f5d624fcc226ef2b8b009838126fe91 /include/asm-arm | |
| parent | b3a1bde4db9889feb116330bff21214811c940e4 (diff) | |
[ARM] 4190/2: Add the secondary GIC support for the RealView/EB
MPCore platform
This patch adds the registration of the secondary GIC on the
baseboard, together with the IRQ chaining setup.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm')
| -rw-r--r-- | include/asm-arm/arch-realview/irqs.h | 5 | ||||
| -rw-r--r-- | include/asm-arm/arch-realview/platform.h | 6 |
2 files changed, 10 insertions, 1 deletions
diff --git a/include/asm-arm/arch-realview/irqs.h b/include/asm-arm/arch-realview/irqs.h index 76b498eb20a..5a5db56f86b 100644 --- a/include/asm-arm/arch-realview/irqs.h +++ b/include/asm-arm/arch-realview/irqs.h @@ -78,6 +78,9 @@ #define IRQ_PMU_SCU6 (IRQ_GIC_START + INT_PMU_SCU6) #define IRQ_PMU_SCU7 (IRQ_GIC_START + INT_PMU_SCU7) +#define IRQ_EB_IRQ1 (IRQ_GIC_START + INT_EB_IRQ1) +#define IRQ_EB_IRQ2 (IRQ_GIC_START + INT_EB_IRQ2) + #define IRQMASK_WDOGINT INTMASK_WDOGINT #define IRQMASK_SOFTINT INTMASK_SOFTINT #define IRQMASK_COMMRx INTMASK_COMMRx @@ -115,4 +118,4 @@ #define IRQMASK_ETH INTMASK_ETH #define IRQMASK_USB INTMASK_USB -#define NR_IRQS (IRQ_GIC_START + 64) +#define NR_IRQS (IRQ_GIC_START + 96) diff --git a/include/asm-arm/arch-realview/platform.h b/include/asm-arm/arch-realview/platform.h index 18d7c18b738..bf52ca752a7 100644 --- a/include/asm-arm/arch-realview/platform.h +++ b/include/asm-arm/arch-realview/platform.h @@ -212,6 +212,8 @@ #define REALVIEW_TWD_BASE 0x10100700 #define REALVIEW_TWD_SIZE 0x00000100 #define REALVIEW_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */ +#define REALVIEW_GIC1_CPU_BASE 0x10040000 /* Generic interrupt controller CPU interface */ +#define REALVIEW_GIC1_DIST_BASE 0x10041000 /* Generic interrupt controller distributor */ #endif #define REALVIEW_SMC_BASE 0x10080000 /* SMC */ /* Reserved 0x10090000 - 0x100EFFFF */ @@ -306,7 +308,11 @@ #define INT_USB 29 /* USB controller */ #define INT_TSPENINT 30 /* Touchscreen pen */ #define INT_TSKPADINT 31 /* Touchscreen keypad */ + #else + +#define MAX_GIC_NR 2 + #define INT_AACI 0 #define INT_TIMERINT0_1 1 #define INT_TIMERINT2_3 2 |