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authorAshok Raj <ashok.raj@intel.com>2005-11-08 21:42:33 -0800
committerGreg Kroah-Hartman <gregkh@suse.de>2005-11-10 16:09:18 -0800
commitb4033c1715cb5aa1dcb1a25bdaf71fea908bb3f1 (patch)
treecf9ba9ae7999573a507df301faf34170ab08e2c3 /include/asm-i386/smp.h
parent48b19148733b4826eeedfd8be9f19b61c8d010b1 (diff)
[PATCH] PCI: Change MSI to use physical delivery mode always
MSI hardcoded delivery mode to use logical delivery mode. Recently x86_64 moved to use physical mode addressing to support physflat mode. With this mode enabled noticed that my eth with MSI werent working. msi_address_init() was hardcoded to use logical mode for i386 and x86_64. So when we switch to use physical mode, things stopped working. Since anyway we dont use lowest priority delivery with MSI, its always directed to just a single CPU. Its safe and simpler to use physical mode always, even when we use logical delivery mode for IPI's or other ioapic RTE's. Signed-off-by: Ashok Raj <ashok.raj@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'include/asm-i386/smp.h')
-rw-r--r--include/asm-i386/smp.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/include/asm-i386/smp.h b/include/asm-i386/smp.h
index 13250199976..61d3ab9db70 100644
--- a/include/asm-i386/smp.h
+++ b/include/asm-i386/smp.h
@@ -45,6 +45,8 @@ extern void unlock_ipi_call_lock(void);
#define MAX_APICID 256
extern u8 x86_cpu_to_apicid[];
+#define cpu_physical_id(cpu) x86_cpu_to_apicid[cpu]
+
#ifdef CONFIG_HOTPLUG_CPU
extern void cpu_exit_clear(void);
extern void cpu_uninit(void);
@@ -92,6 +94,10 @@ extern int __cpu_disable(void);
extern void __cpu_die(unsigned int cpu);
#endif /* !__ASSEMBLY__ */
+#else /* CONFIG_SMP */
+
+#define cpu_physical_id(cpu) boot_cpu_physical_apicid
+
#define NO_PROC_ID 0xFF /* No processor magic marker */
#endif