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authorSuresh Siddha <suresh.b.siddha@intel.com>2005-04-25 13:25:06 -0700
committerTony Luck <tony.luck@intel.com>2005-04-25 13:25:06 -0700
commite927ecb05e1ce4bbb1e10f57008c94994e2160f5 (patch)
treebc8256cc074f02d557088696035982fa7ae0b301 /include/asm-ia64/sal.h
parent6118ec847e8e35393efc0f88394c2f5dd48c3313 (diff)
[IA64] multi-core/multi-thread identification
Version 3 - rediffed to apply on top of Ashok's hotplug cpu patch. /proc/cpuinfo output in step with x86. This is an updated MC/MT identification patch based on the previous discussions on list. Add the Multi-core and Multi-threading detection for IPF. - Add new core and threading related fields in /proc/cpuinfo. Physical id Core id Thread id Siblings - setup the cpu_core_map and cpu_sibling_map appropriately - Handles Hot plug CPU Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: Gordon Jin <gordon.jin@intel.com> Signed-off-by: Rohit Seth <rohit.seth@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'include/asm-ia64/sal.h')
-rw-r--r--include/asm-ia64/sal.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/include/asm-ia64/sal.h b/include/asm-ia64/sal.h
index 240676f7539..29df88bdd2b 100644
--- a/include/asm-ia64/sal.h
+++ b/include/asm-ia64/sal.h
@@ -91,6 +91,7 @@ extern spinlock_t sal_lock;
#define SAL_PCI_CONFIG_READ 0x01000010
#define SAL_PCI_CONFIG_WRITE 0x01000011
#define SAL_FREQ_BASE 0x01000012
+#define SAL_PHYSICAL_ID_INFO 0x01000013
#define SAL_UPDATE_PAL 0x01000020
@@ -815,6 +816,17 @@ ia64_sal_update_pal (u64 param_buf, u64 scratch_buf, u64 scratch_buf_size,
return isrv.status;
}
+/* Get physical processor die mapping in the platform. */
+static inline s64
+ia64_sal_physical_id_info(u16 *splid)
+{
+ struct ia64_sal_retval isrv;
+ SAL_CALL(isrv, SAL_PHYSICAL_ID_INFO, 0, 0, 0, 0, 0, 0, 0);
+ if (splid)
+ *splid = isrv.v0;
+ return isrv.status;
+}
+
extern unsigned long sal_platform_features;
extern int (*salinfo_platform_oemdata)(const u8 *, u8 **, u64 *);