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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-10-14 22:24:51 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-10-14 22:24:51 +0100
commit7e69a8c4d06b7ecb874f571e82b715a9f79bc3c4 (patch)
tree0248fb8f7a3e445cc3c744252abeecabb9205c05 /include/asm-mips/smtc.h
parentb6825d2df55aa7d7341c715b577b73a6a03dc944 (diff)
parentd5120ae72a066b18f98e0c45ce73262f58030851 (diff)
Merge branch 's3c-move' into devel
Conflicts: arch/arm/mach-versatile/core.c
Diffstat (limited to 'include/asm-mips/smtc.h')
-rw-r--r--include/asm-mips/smtc.h8
1 files changed, 5 insertions, 3 deletions
diff --git a/include/asm-mips/smtc.h b/include/asm-mips/smtc.h
index 3639b28f80d..ea60bf08dcb 100644
--- a/include/asm-mips/smtc.h
+++ b/include/asm-mips/smtc.h
@@ -6,6 +6,7 @@
*/
#include <asm/mips_mt.h>
+#include <asm/smtc_ipi.h>
/*
* System-wide SMTC status information
@@ -38,14 +39,15 @@ struct mm_struct;
struct task_struct;
void smtc_get_new_mmu_context(struct mm_struct *mm, unsigned long cpu);
-
+void self_ipi(struct smtc_ipi *);
void smtc_flush_tlb_asid(unsigned long asid);
-extern int mipsmt_build_cpu_map(int startslot);
-extern void mipsmt_prepare_cpus(void);
+extern int smtc_build_cpu_map(int startslot);
+extern void smtc_prepare_cpus(int cpus);
extern void smtc_smp_finish(void);
extern void smtc_boot_secondary(int cpu, struct task_struct *t);
extern void smtc_cpus_done(void);
+
/*
* Sharing the TLB between multiple VPEs means that the
* "random" index selection function is not allowed to