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| author | Jeff Garzik <jgarzik@pobox.com> | 2005-10-28 18:48:57 -0400 |
|---|---|---|
| committer | Jeff Garzik <jgarzik@pobox.com> | 2005-10-28 18:48:57 -0400 |
| commit | 596c96ba06e5d56e72451e02f93f4e15e17458df (patch) | |
| tree | 78bc640acacb8faeb621c51296e99dbb0533a147 /include/asm-parisc/spinlock.h | |
| parent | ad18b0ea089928367185e13d11424aea91d4b41f (diff) | |
| parent | 20731945ae743034353a88c307920d1f16cf8ac8 (diff) | |
Merge branch 'master'
Diffstat (limited to 'include/asm-parisc/spinlock.h')
| -rw-r--r-- | include/asm-parisc/spinlock.h | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/include/asm-parisc/spinlock.h b/include/asm-parisc/spinlock.h index 43eaa6e742e..7c3f406a746 100644 --- a/include/asm-parisc/spinlock.h +++ b/include/asm-parisc/spinlock.h @@ -5,11 +5,6 @@ #include <asm/processor.h> #include <asm/spinlock_types.h> -/* Note that PA-RISC has to use `1' to mean unlocked and `0' to mean locked - * since it only has load-and-zero. Moreover, at least on some PA processors, - * the semaphore address has to be 16-byte aligned. - */ - static inline int __raw_spin_is_locked(raw_spinlock_t *x) { volatile unsigned int *a = __ldcw_align(x); |