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authorValentine Barshak <vbarshak@ru.mvista.com>2008-03-06 05:38:04 +1100
committerJosh Boyer <jwboyer@linux.vnet.ibm.com>2008-03-26 07:20:38 -0500
commit266d028acb615e1766c3fb9530c9e86de8476a33 (patch)
tree5f8beaee529761b26ee858d91a8ee9262a80264d /include/asm-powerpc/dcr-native.h
parentd0a48c9f4c4582a966ce6426c1bf8ef1e37e63ee (diff)
[POWERPC] 4xx: Add dcri_clrset() for locked read/modify/write functionality
This adds dcri_clrset() macro which does read/modify/write on indirect dcr registers while holding indirect dcr lock. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Diffstat (limited to 'include/asm-powerpc/dcr-native.h')
-rw-r--r--include/asm-powerpc/dcr-native.h17
1 files changed, 17 insertions, 0 deletions
diff --git a/include/asm-powerpc/dcr-native.h b/include/asm-powerpc/dcr-native.h
index be6c879e876..f8398ce8037 100644
--- a/include/asm-powerpc/dcr-native.h
+++ b/include/asm-powerpc/dcr-native.h
@@ -82,6 +82,19 @@ static inline void __mtdcri(int base_addr, int base_data, int reg,
spin_unlock_irqrestore(&dcr_ind_lock, flags);
}
+static inline void __dcri_clrset(int base_addr, int base_data, int reg,
+ unsigned clr, unsigned set)
+{
+ unsigned long flags;
+ unsigned int val;
+
+ spin_lock_irqsave(&dcr_ind_lock, flags);
+ __mtdcr(base_addr, reg);
+ val = (__mfdcr(base_data) & ~clr) | set;
+ __mtdcr(base_data, val);
+ spin_unlock_irqrestore(&dcr_ind_lock, flags);
+}
+
#define mfdcri(base, reg) __mfdcri(DCRN_ ## base ## _CONFIG_ADDR, \
DCRN_ ## base ## _CONFIG_DATA, \
reg)
@@ -90,6 +103,10 @@ static inline void __mtdcri(int base_addr, int base_data, int reg,
DCRN_ ## base ## _CONFIG_DATA, \
reg, data)
+#define dcri_clrset(base, reg, clr, set) __dcri_clrset(DCRN_ ## base ## _CONFIG_ADDR, \
+ DCRN_ ## base ## _CONFIG_DATA, \
+ reg, clr, set)
+
#endif /* __ASSEMBLY__ */
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_DCR_NATIVE_H */