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authorLinas Vepstas <linas@linas.org>2005-11-03 18:52:49 -0600
committerPaul Mackerras <paulus@samba.org>2006-01-10 15:28:32 +1100
commit77bd741561016134d1761d6101c4f0361025062f (patch)
tree5e3389b6941add4b24a2be64c730b7a9087c1f2f /include/asm-powerpc/eeh.h
parent977127174a7dff52d17faeeb4c4949a54221881f (diff)
[PATCH] powerpc: PCI Error Recovery: PPC64 core recovery routines
Various PCI bus errors can be signaled by newer PCI controllers. The core error recovery routines are architecture dependent. This patch adds a recovery infrastructure for the PPC64 pSeries systems. Signed-off-by: Linas Vepstas <linas@austin.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org> (cherry picked from e8ca11b460c4c9c7fa6b529be221529ebd770e38 commit)
Diffstat (limited to 'include/asm-powerpc/eeh.h')
-rw-r--r--include/asm-powerpc/eeh.h8
1 files changed, 5 insertions, 3 deletions
diff --git a/include/asm-powerpc/eeh.h b/include/asm-powerpc/eeh.h
index 4395b7bc1ed..b263fb2fa6e 100644
--- a/include/asm-powerpc/eeh.h
+++ b/include/asm-powerpc/eeh.h
@@ -34,9 +34,11 @@ struct device_node;
extern int eeh_subsystem_enabled;
/* Values for eeh_mode bits in device_node */
-#define EEH_MODE_SUPPORTED (1<<0)
-#define EEH_MODE_NOCHECK (1<<1)
-#define EEH_MODE_ISOLATED (1<<2)
+#define EEH_MODE_SUPPORTED (1<<0)
+#define EEH_MODE_NOCHECK (1<<1)
+#define EEH_MODE_ISOLATED (1<<2)
+#define EEH_MODE_RECOVERING (1<<3)
+#define EEH_MODE_IRQ_DISABLED (1<<4)
/* Max number of EEH freezes allowed before we consider the device
* to be permanently disabled. */