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authorRavikiran G Thirumalai <kiran@scalex86.org>2006-01-08 01:01:28 -0800
committerLinus Torvalds <torvalds@g5.osdl.org>2006-01-08 20:13:39 -0800
commit1fd73c6b6737b7e6eacac1b00dac16e7540c3cb1 (patch)
treee66dbe34118b289c6f89a23764e355ea62fa2c62 /include/asm-powerpc
parent22fc6eccbf4ce4eb6265e6ada7b50a7b9cc57d05 (diff)
[PATCH] Kill L1_CACHE_SHIFT_MAX
Kill L1_CACHE_SHIFT from all arches. Since L1_CACHE_SHIFT_MAX is not used anymore with the introduction of INTERNODE_CACHE, kill L1_CACHE_SHIFT_MAX. Signed-off-by: Ravikiran Thirumalai <kiran@scalex86.org> Signed-off-by: Shai Fultheim <shai@scalex86.org> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-powerpc')
-rw-r--r--include/asm-powerpc/cache.h1
-rw-r--r--include/asm-powerpc/dma-mapping.h2
2 files changed, 1 insertions, 2 deletions
diff --git a/include/asm-powerpc/cache.h b/include/asm-powerpc/cache.h
index 26ce502e76e..6379c2df5c4 100644
--- a/include/asm-powerpc/cache.h
+++ b/include/asm-powerpc/cache.h
@@ -19,7 +19,6 @@
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
#define SMP_CACHE_BYTES L1_CACHE_BYTES
-#define L1_CACHE_SHIFT_MAX 7 /* largest L1 which this arch supports */
#if defined(__powerpc64__) && !defined(__ASSEMBLY__)
struct ppc64_caches {
diff --git a/include/asm-powerpc/dma-mapping.h b/include/asm-powerpc/dma-mapping.h
index 59a80163f75..a96e5742ca3 100644
--- a/include/asm-powerpc/dma-mapping.h
+++ b/include/asm-powerpc/dma-mapping.h
@@ -229,7 +229,7 @@ static inline int dma_get_cache_alignment(void)
#ifdef CONFIG_PPC64
/* no easy way to get cache size on all processors, so return
* the maximum possible, to be safe */
- return (1 << L1_CACHE_SHIFT_MAX);
+ return (1 << INTERNODE_CACHE_SHIFT);
#else
/*
* Each processor family will define its own L1_CACHE_SHIFT,