diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-07-28 08:41:13 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-07-28 08:41:13 -0700 |
| commit | b10a8b7238d7b034f28d32a85bb05c48475f132a (patch) | |
| tree | 8e70e816757c2a517de6fb721dd9ac2276619c26 /include/asm-sh/se7722.h | |
| parent | 37eaf8c7463e53cf1acf025fb566fb6c4573297f (diff) | |
| parent | 8b2224dc6a5b46cfa1d54ab1fe82107351c66443 (diff) | |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (72 commits)
sh: SuperH Mobile CEU and camera platform data for AP325RXA
sh: Update smc911x platform data for AP325RXA
sh: SuperH Mobile LCDC platform data for AP325RXA
sh: Add SuperH Mobile CEU platform data for Migo-R
sh: Add SuperH Mobile LCDC platform data for Migo-R
sh: Move asid_cache() out of ifdef to fix SH-3/4 nommu build.
sh: Workaround for __put_user_asm() bug with gcc 4.x on big-endian.
sh: Wire up new syscalls.
sh: fix uImage Entry Point
sh_keysc: remove request_mem_region() and release_mem_region()
sh: Don't miss pending signals returning to user mode after signal processing
sh: Use clk_always_enable() on sh7366
sh: Use clk_always_enable() on sh7343 / SE77343
sh: Use clk_always_enable() on sh7722 / Migo-R / SE7722
sh: Use clk_always_enable() on sh7723 / ap325rxa
sh: Introduce clk_always_enable() function
sh: Show all clocks and their state in /proc/clocks
sh: Merge sh7343 and sh7722 clock code
sh: Add SuperH Mobile MSTPCR bits to clock framework
sh: Use arch_flags to simplify sh7722 siu clock code
...
Diffstat (limited to 'include/asm-sh/se7722.h')
| -rw-r--r-- | include/asm-sh/se7722.h | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/include/asm-sh/se7722.h b/include/asm-sh/se7722.h index 3690fe5857a..e971d9a82f4 100644 --- a/include/asm-sh/se7722.h +++ b/include/asm-sh/se7722.h @@ -55,10 +55,6 @@ #define PA_LAN (PA_AREA6_IO + 0) /* SMC LAN91C111 */ /* GPIO */ -#define MSTPCR0 0xA4150030UL -#define MSTPCR1 0xA4150034UL -#define MSTPCR2 0xA4150038UL - #define FPGA_IN 0xb1840000UL #define FPGA_OUT 0xb1840004UL |