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| author | David Woodhouse <dwmw2@infradead.org> | 2007-01-18 10:34:51 +1100 |
|---|---|---|
| committer | David Woodhouse <dwmw2@infradead.org> | 2007-01-18 10:34:51 +1100 |
| commit | 9cdf083f981b8d37b3212400a359368661385099 (patch) | |
| tree | aa15a6a08ad87e650dea40fb59b3180bef0d345b /include/asm-xtensa/byteorder.h | |
| parent | e499e01d234a31d59679b7b1e1cf628d917ba49a (diff) | |
| parent | a8b3485287731978899ced11f24628c927890e78 (diff) | |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Diffstat (limited to 'include/asm-xtensa/byteorder.h')
| -rw-r--r-- | include/asm-xtensa/byteorder.h | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/include/asm-xtensa/byteorder.h b/include/asm-xtensa/byteorder.h index 0b1552569aa..0f540a5f4c0 100644 --- a/include/asm-xtensa/byteorder.h +++ b/include/asm-xtensa/byteorder.h @@ -11,10 +11,9 @@ #ifndef _XTENSA_BYTEORDER_H #define _XTENSA_BYTEORDER_H -#include <asm/processor.h> #include <asm/types.h> -static __inline__ __const__ __u32 ___arch__swab32(__u32 x) +static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x) { __u32 res; /* instruction sequence from Xtensa ISA release 2/2000 */ @@ -29,7 +28,7 @@ static __inline__ __const__ __u32 ___arch__swab32(__u32 x) return res; } -static __inline__ __const__ __u16 ___arch__swab16(__u16 x) +static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x) { /* Given that 'short' values are signed (i.e., can be negative), * we cannot assume that the upper 16-bits of the register are |