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authorRalf Baechle <ralf@linux-mips.org>2005-10-29 19:32:40 +0100
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 19:32:40 +0100
commitbeb3ca82fc0c2ec938b7446b006c8f34abb301b2 (patch)
treeea89c648dbeae35bdbe9734b2138ecdebdb55fe1 /include
parent4ee1303a787434d4994ae68d028ca025e339b434 (diff)
More configcheck fixes.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include')
-rw-r--r--include/asm-mips/mach-au1x00/au1xxx_psc.h2
-rw-r--r--include/asm-mips/mmzone.h1
-rw-r--r--include/asm-mips/spinlock.h5
3 files changed, 5 insertions, 3 deletions
diff --git a/include/asm-mips/mach-au1x00/au1xxx_psc.h b/include/asm-mips/mach-au1x00/au1xxx_psc.h
index 283519dfdec..8e5fb3c7da4 100644
--- a/include/asm-mips/mach-au1x00/au1xxx_psc.h
+++ b/include/asm-mips/mach-au1x00/au1xxx_psc.h
@@ -33,6 +33,8 @@
#ifndef _AU1000_PSC_H_
#define _AU1000_PSC_H_
+#include <linux/config.h>
+
/* The PSC base addresses. */
#ifdef CONFIG_SOC_AU1550
#define PSC0_BASE_ADDR 0xb1a00000
diff --git a/include/asm-mips/mmzone.h b/include/asm-mips/mmzone.h
index d721143dbd4..011caebac36 100644
--- a/include/asm-mips/mmzone.h
+++ b/include/asm-mips/mmzone.h
@@ -5,6 +5,7 @@
#ifndef _ASM_MMZONE_H_
#define _ASM_MMZONE_H_
+#include <linux/config.h>
#include <asm/page.h>
#include <mmzone.h>
diff --git a/include/asm-mips/spinlock.h b/include/asm-mips/spinlock.h
index 7d1cc75a1cb..669b8e349ff 100644
--- a/include/asm-mips/spinlock.h
+++ b/include/asm-mips/spinlock.h
@@ -9,17 +9,16 @@
#ifndef _ASM_SPINLOCK_H
#define _ASM_SPINLOCK_H
-#include <linux/config.h>
#include <asm/war.h>
/*
* Your basic SMP spinlocks, allowing only a single CPU anywhere
*/
-#define __raw_spin_is_locked(x) ((x)->lock != 0)
+#define __raw_spin_is_locked(x) ((x)->lock != 0)
#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
#define __raw_spin_unlock_wait(x) \
- do { cpu_relax(); } while ((x)->lock)
+ do { cpu_relax(); } while ((x)->lock)
/*
* Simple spin lock operations. There are two variants, one clears IRQ's