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authorJason Wessel <jason.wessel@windriver.com>2008-04-01 16:55:28 -0500
committerIngo Molnar <mingo@elte.hu>2008-04-17 20:05:43 +0200
commit1a9a3e76dde191f82f7a8a66059dcbb4a9f63ff3 (patch)
treed1bfaca84bf03dc79caf70747f7c289558e3c7e9 /kernel/kgdb.c
parent56fb70932964927597ce30bbd820471633c72adc (diff)
kgdb: always use icache flush for sw breakpoints
On the ppc 4xx architecture the instruction cache must be flushed as well as the data cache. This patch just makes it generic for all architectures where CACHE_FLUSH_IS_SAFE is set to 1. Signed-off-by: Jason Wessel <jason.wessel@windriver.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'kernel/kgdb.c')
-rw-r--r--kernel/kgdb.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/kernel/kgdb.c b/kernel/kgdb.c
index 4d1b3c23237..1bd0ec1c80b 100644
--- a/kernel/kgdb.c
+++ b/kernel/kgdb.c
@@ -591,9 +591,9 @@ static void kgdb_flush_swbreak_addr(unsigned long addr)
if (current->mm && current->mm->mmap_cache) {
flush_cache_range(current->mm->mmap_cache,
addr, addr + BREAK_INSTR_SIZE);
- } else {
- flush_icache_range(addr, addr + BREAK_INSTR_SIZE);
}
+ /* Force flush instruction cache if it was outside the mm */
+ flush_icache_range(addr, addr + BREAK_INSTR_SIZE);
}
/*