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authorBryan O'Sullivan <bos@pathscale.com>2007-03-15 14:44:47 -0700
committerRoland Dreier <rolandd@cisco.com>2007-04-18 20:20:54 -0700
commit19085745598ec254fd814411b675b52380c3bac0 (patch)
tree766aee5e8b121813df10d3b53e54e4870a45f6f2 /net/sched/sch_prio.c
parent165c552c35052284e8ec4f7e9c027dfd33490e2c (diff)
IB/ipath: Definitions of two RXE parity err bits were reversed
The chip documentation on the expected TID vs eager TID parity error bits was reversed from what was implemented in the RTL, for both chips. This corrects the definitions. Signed-off-by: Dave Olson <dave.olson@qlogic.com> Signed-off-by: Bryan O'Sullivan <bryan.osullivan@qlogic.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'net/sched/sch_prio.c')
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