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authorJonas Andersson <jonas@microbit.se>2009-03-04 08:24:26 +0100
committerMark Brown <broonie@opensource.wolfsonmicro.com>2009-03-04 14:47:39 +0000
commit86027ae78c9294bb450b76eec28cfb431a8fb3ee (patch)
tree4e2634b23e5f050f0065ad4ff2a6845409f1e532 /sound/soc/codecs/wm9713.c
parentec67624d33d5639bcc6ee6918cb1fc0bd1bac3a8 (diff)
ASoC: wm8510 pll settings
When setting WM8510_MCLKDIV the pll was turned off. When setting pll frequency you got twice the expected freq, because the code calculated with postscaler of 8, but the hardware divide by 4. Signed-off-by: Jonas Andersson <jonas@microbit.se> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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