diff options
| author | merge <null@invalid> | 2009-02-24 01:49:53 +0000 |
|---|---|---|
| committer | Andy Green <agreen@octopus.localdomain> | 2009-02-24 01:49:53 +0000 |
| commit | 7fafbf75a0978b79e32c6a0ce15a776fea6d8481 (patch) | |
| tree | 0d4eacd74a04b0bd9c0e2c926aefe07b8f48a38d /sound/soc/codecs | |
| parent | 1c6a91fef7cb2e0fc4f41ddcfff74565b2a7659e (diff) | |
MERGE-via-pending-tracking-hist-MERGE-via-stable-tracking-MERGE-via-mokopatches-tracking-s3c64xx-dma-support-1235439162-1235439227
pending-tracking-hist top was MERGE-via-stable-tracking-MERGE-via-mokopatches-tracking-s3c64xx-dma-support-1235439162-1235439227 / 3d6a1b21cf5fbdb6250d781b0a4900a7a0768aa1 ... parent commitmessage:
From: merge <null@invalid>
MERGE-via-stable-tracking-hist-MERGE-via-mokopatches-tracking-s3c64xx-dma-support-1235439162
stable-tracking-hist top was MERGE-via-mokopatches-tracking-s3c64xx-dma-support-1235439162 / 893e864e65adffc9eb085ed4f8b552a31dcec840 ... parent commitmessage:
From: merge <null@invalid>
MERGE-via-mokopatches-tracking-hist-s3c64xx-dma-support
mokopatches-tracking-hist top was s3c64xx-dma-support / 2515f9a1d53d19b1e61d639875aedcbe7929666e ... parent commitmessage:
From: Ben Dooks <ben@simtec.co.uk>
S3C64XX: DMA support
Add support for the DMA blocks in the S3C64XX series
of CPUS, which are based on the ARM PL080 PrimeCell
system.
Unfortunately, these DMA controllers diverge from the
PL080 design by adding another DMA controller register
and configuration for OneNAND.
Signed-off-by: Ben Dooks <ben@simtec.co.uk>
Diffstat (limited to 'sound/soc/codecs')
| -rw-r--r-- | sound/soc/codecs/wm8731.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/sound/soc/codecs/wm8731.c b/sound/soc/codecs/wm8731.c index efbd4449bd3..6edd3447f5a 100644 --- a/sound/soc/codecs/wm8731.c +++ b/sound/soc/codecs/wm8731.c @@ -73,6 +73,8 @@ static inline void wm8731_write_reg_cache(struct snd_soc_codec *codec, u16 *cache = codec->reg_cache; if (reg >= WM8731_CACHEREGNUM) return; + + printk(KERN_INFO "%s: reg %d, val %04x\n", __func__, reg, value); cache[reg] = value; } @@ -84,6 +86,8 @@ static int wm8731_write(struct snd_soc_codec *codec, unsigned int reg, { u8 data[2]; + printk(KERN_INFO "%s: reg %d val %04x\n", __func__, reg, value); + /* data is * D15..D9 WM8731 register offset * D8...D0 register data |