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| author | merge <null@invalid> | 2009-02-24 01:49:53 +0000 |
|---|---|---|
| committer | Andy Green <agreen@octopus.localdomain> | 2009-02-24 01:49:53 +0000 |
| commit | 7fafbf75a0978b79e32c6a0ce15a776fea6d8481 (patch) | |
| tree | 0d4eacd74a04b0bd9c0e2c926aefe07b8f48a38d /sound/soc/s3c24xx/s3c24xx-pcm.c | |
| parent | 1c6a91fef7cb2e0fc4f41ddcfff74565b2a7659e (diff) | |
MERGE-via-pending-tracking-hist-MERGE-via-stable-tracking-MERGE-via-mokopatches-tracking-s3c64xx-dma-support-1235439162-1235439227
pending-tracking-hist top was MERGE-via-stable-tracking-MERGE-via-mokopatches-tracking-s3c64xx-dma-support-1235439162-1235439227 / 3d6a1b21cf5fbdb6250d781b0a4900a7a0768aa1 ... parent commitmessage:
From: merge <null@invalid>
MERGE-via-stable-tracking-hist-MERGE-via-mokopatches-tracking-s3c64xx-dma-support-1235439162
stable-tracking-hist top was MERGE-via-mokopatches-tracking-s3c64xx-dma-support-1235439162 / 893e864e65adffc9eb085ed4f8b552a31dcec840 ... parent commitmessage:
From: merge <null@invalid>
MERGE-via-mokopatches-tracking-hist-s3c64xx-dma-support
mokopatches-tracking-hist top was s3c64xx-dma-support / 2515f9a1d53d19b1e61d639875aedcbe7929666e ... parent commitmessage:
From: Ben Dooks <ben@simtec.co.uk>
S3C64XX: DMA support
Add support for the DMA blocks in the S3C64XX series
of CPUS, which are based on the ARM PL080 PrimeCell
system.
Unfortunately, these DMA controllers diverge from the
PL080 design by adding another DMA controller register
and configuration for OneNAND.
Signed-off-by: Ben Dooks <ben@simtec.co.uk>
Diffstat (limited to 'sound/soc/s3c24xx/s3c24xx-pcm.c')
| -rw-r--r-- | sound/soc/s3c24xx/s3c24xx-pcm.c | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/sound/soc/s3c24xx/s3c24xx-pcm.c b/sound/soc/s3c24xx/s3c24xx-pcm.c index e797e862724..7458f00dfab 100644 --- a/sound/soc/s3c24xx/s3c24xx-pcm.c +++ b/sound/soc/s3c24xx/s3c24xx-pcm.c @@ -82,11 +82,19 @@ static void s3c24xx_pcm_enqueue(struct snd_pcm_substream *substream) { struct s3c24xx_runtime_data *prtd = substream->runtime->private_data; dma_addr_t pos = prtd->dma_pos; + unsigned int limit; int ret; DBG("Entered %s\n", __func__); - while (prtd->dma_loaded < prtd->dma_limit) { + if (s3c_dma_has_circular()) { + limit = (prtd->dma_end - prtd->dma_start) / prtd->dma_period; + } else + limit = prtd->dma_limit; + + printk(KERN_INFO "%s: loaded %d, limit %d\n", __func__, prtd->dma_loaded, limit); + + while (prtd->dma_loaded < limit) { unsigned long len = prtd->dma_period; DBG("dma_loaded: %d\n", prtd->dma_loaded); @@ -130,7 +138,7 @@ static void s3c24xx_audio_buffdone(struct s3c2410_dma_chan *channel, snd_pcm_period_elapsed(substream); spin_lock(&prtd->lock); - if (prtd->state & ST_RUNNING) { + if (prtd->state & ST_RUNNING && !s3c_dma_has_circular()) { prtd->dma_loaded--; s3c24xx_pcm_enqueue(substream); } @@ -171,6 +179,11 @@ static int s3c24xx_pcm_hw_params(struct snd_pcm_substream *substream, DBG(KERN_ERR "failed to get dma channel: %d\n", ret); return ret; } + + /* use the circular buffering if we have it available. */ + if (s3c_dma_has_circular()) + s3c2410_dma_setflags(prtd->params->channel, + S3C2410_DMAF_CIRCULAR); } s3c2410_dma_set_buffdone_fn(prtd->params->channel, |