diff options
| -rw-r--r-- | arch/sh/Makefile | 26 | ||||
| -rw-r--r-- | arch/sh/include/cpu-common/cpu/addrspace.h (renamed from arch/sh/include/cpu-sh2/cpu/addrspace.h) | 0 | ||||
| -rw-r--r-- | arch/sh/include/cpu-common/cpu/cacheflush.h (renamed from arch/sh/include/cpu-sh2a/cpu/cacheflush.h) | 4 | ||||
| -rw-r--r-- | arch/sh/include/cpu-common/cpu/mmu_context.h (renamed from arch/sh/include/cpu-sh2/cpu/mmu_context.h) | 0 | ||||
| -rw-r--r-- | arch/sh/include/cpu-common/cpu/sigcontext.h (renamed from arch/sh/include/cpu-sh2/cpu/sigcontext.h) | 0 | ||||
| -rw-r--r-- | arch/sh/include/cpu-common/cpu/timer.h (renamed from arch/sh/include/cpu-sh2/cpu/timer.h) | 0 | ||||
| -rw-r--r-- | arch/sh/include/cpu-sh2/cpu/cacheflush.h | 44 | ||||
| -rw-r--r-- | arch/sh/include/cpu-sh2a/cpu/addrspace.h | 10 | ||||
| -rw-r--r-- | arch/sh/include/cpu-sh2a/cpu/dma.h | 24 | ||||
| -rw-r--r-- | arch/sh/include/cpu-sh2a/cpu/mmu_context.h | 16 | ||||
| -rw-r--r-- | arch/sh/include/cpu-sh2a/cpu/timer.h | 6 | ||||
| -rw-r--r-- | arch/sh/include/cpu-sh2a/cpu/ubc.h | 33 | ||||
| -rw-r--r-- | arch/sh/include/cpu-sh2a/cpu/watchdog.h | 70 |
13 files changed, 23 insertions, 210 deletions
diff --git a/arch/sh/Makefile b/arch/sh/Makefile index fb3b65ed291..fafc01236f6 100644 --- a/arch/sh/Makefile +++ b/arch/sh/Makefile @@ -91,7 +91,6 @@ LDFLAGS_vmlinux += --defsym 'jiffies=jiffies_64+4' LDFLAGS += -EB endif - head-y := arch/sh/kernel/init_task.o head-$(CONFIG_SUPERH32) += arch/sh/kernel/head_32.o head-$(CONFIG_SUPERH64) += arch/sh/kernel/head_64.o @@ -134,11 +133,22 @@ endif # Companion chips core-$(CONFIG_HD6446X_SERIES) += arch/sh/cchips/hd6446x/ -cpuincdir-$(CONFIG_CPU_SH2) := cpu-sh2 -cpuincdir-$(CONFIG_CPU_SH2A) := cpu-sh2a -cpuincdir-$(CONFIG_CPU_SH3) := cpu-sh3 -cpuincdir-$(CONFIG_CPU_SH4) := cpu-sh4 -cpuincdir-$(CONFIG_CPU_SH5) := cpu-sh5 +# +# CPU header paths +# +# These are ordered by optimization level. A CPU family that is a subset +# of another (ie, SH-2A / SH-2), is picked up first, with increasing +# levels of genericness if nothing more suitable is situated in the +# hierarchy. +# +# As an example, in order of preference, SH-2A > SH-2 > common definitions. +# +cpuincdir-$(CONFIG_CPU_SH2A) += cpu-sh2a +cpuincdir-$(CONFIG_CPU_SH2) += cpu-sh2 +cpuincdir-$(CONFIG_CPU_SH3) += cpu-sh3 +cpuincdir-$(CONFIG_CPU_SH4) += cpu-sh4 +cpuincdir-$(CONFIG_CPU_SH5) += cpu-sh5 +cpuincdir-y += cpu-common # Must be last libs-$(CONFIG_SUPERH32) := arch/sh/lib/ $(libs-y) libs-$(CONFIG_SUPERH64) := arch/sh/lib64/ $(libs-y) @@ -149,8 +159,8 @@ drivers-$(CONFIG_OPROFILE) += arch/sh/oprofile/ boot := arch/sh/boot -cflags-y += -Iarch/sh/include/$(cpuincdir-y) -cflags-y += $(foreach d, $(machdir-y), -Iarch/sh/include/$(d)) +cflags-y += $(foreach d, $(cpuincdir-y), -Iarch/sh/include/$(d)) \ + $(foreach d, $(machdir-y), -Iarch/sh/include/$(d)) KBUILD_CFLAGS += -pipe $(cflags-y) KBUILD_CPPFLAGS += $(cflags-y) diff --git a/arch/sh/include/cpu-sh2/cpu/addrspace.h b/arch/sh/include/cpu-common/cpu/addrspace.h index 2b9ab93efa4..2b9ab93efa4 100644 --- a/arch/sh/include/cpu-sh2/cpu/addrspace.h +++ b/arch/sh/include/cpu-common/cpu/addrspace.h diff --git a/arch/sh/include/cpu-sh2a/cpu/cacheflush.h b/arch/sh/include/cpu-common/cpu/cacheflush.h index 2979efb26de..c3db00b7360 100644 --- a/arch/sh/include/cpu-sh2a/cpu/cacheflush.h +++ b/arch/sh/include/cpu-common/cpu/cacheflush.h @@ -10,7 +10,7 @@ #ifndef __ASM_CPU_SH2_CACHEFLUSH_H #define __ASM_CPU_SH2_CACHEFLUSH_H -/* +/* * Cache flushing: * * - flush_cache_all() flushes entire cache @@ -40,5 +40,5 @@ #define flush_cache_sigtramp(vaddr) do { } while (0) #define p3_cache_init() do { } while (0) -#endif /* __ASM_CPU_SH2_CACHEFLUSH_H */ +#endif /* __ASM_CPU_SH2_CACHEFLUSH_H */ diff --git a/arch/sh/include/cpu-sh2/cpu/mmu_context.h b/arch/sh/include/cpu-common/cpu/mmu_context.h index beeb299e01e..beeb299e01e 100644 --- a/arch/sh/include/cpu-sh2/cpu/mmu_context.h +++ b/arch/sh/include/cpu-common/cpu/mmu_context.h diff --git a/arch/sh/include/cpu-sh2/cpu/sigcontext.h b/arch/sh/include/cpu-common/cpu/sigcontext.h index fe5c15dd6e8..fe5c15dd6e8 100644 --- a/arch/sh/include/cpu-sh2/cpu/sigcontext.h +++ b/arch/sh/include/cpu-common/cpu/sigcontext.h diff --git a/arch/sh/include/cpu-sh2/cpu/timer.h b/arch/sh/include/cpu-common/cpu/timer.h index a39c241e819..a39c241e819 100644 --- a/arch/sh/include/cpu-sh2/cpu/timer.h +++ b/arch/sh/include/cpu-common/cpu/timer.h diff --git a/arch/sh/include/cpu-sh2/cpu/cacheflush.h b/arch/sh/include/cpu-sh2/cpu/cacheflush.h deleted file mode 100644 index 2979efb26de..00000000000 --- a/arch/sh/include/cpu-sh2/cpu/cacheflush.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * include/asm-sh/cpu-sh2/cacheflush.h - * - * Copyright (C) 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH2_CACHEFLUSH_H -#define __ASM_CPU_SH2_CACHEFLUSH_H - -/* - * Cache flushing: - * - * - flush_cache_all() flushes entire cache - * - flush_cache_mm(mm) flushes the specified mm context's cache lines - * - flush_cache_dup mm(mm) handles cache flushing when forking - * - flush_cache_page(mm, vmaddr, pfn) flushes a single page - * - flush_cache_range(vma, start, end) flushes a range of pages - * - * - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache - * - flush_icache_range(start, end) flushes(invalidates) a range for icache - * - flush_icache_page(vma, pg) flushes(invalidates) a page for icache - * - * Caches are indexed (effectively) by physical address on SH-2, so - * we don't need them. - */ -#define flush_cache_all() do { } while (0) -#define flush_cache_mm(mm) do { } while (0) -#define flush_cache_dup_mm(mm) do { } while (0) -#define flush_cache_range(vma, start, end) do { } while (0) -#define flush_cache_page(vma, vmaddr, pfn) do { } while (0) -#define flush_dcache_page(page) do { } while (0) -#define flush_dcache_mmap_lock(mapping) do { } while (0) -#define flush_dcache_mmap_unlock(mapping) do { } while (0) -#define flush_icache_range(start, end) do { } while (0) -#define flush_icache_page(vma,pg) do { } while (0) -#define flush_icache_user_range(vma,pg,adr,len) do { } while (0) -#define flush_cache_sigtramp(vaddr) do { } while (0) - -#define p3_cache_init() do { } while (0) -#endif /* __ASM_CPU_SH2_CACHEFLUSH_H */ - diff --git a/arch/sh/include/cpu-sh2a/cpu/addrspace.h b/arch/sh/include/cpu-sh2a/cpu/addrspace.h deleted file mode 100644 index 795ddd6856a..00000000000 --- a/arch/sh/include/cpu-sh2a/cpu/addrspace.h +++ /dev/null @@ -1,10 +0,0 @@ -#ifndef __ASM_SH_CPU_SH2A_ADDRSPACE_H -#define __ASM_SH_CPU_SH2A_ADDRSPACE_H - -#define P0SEG 0x00000000 -#define P1SEG 0x00000000 -#define P2SEG 0x20000000 -#define P3SEG 0x00000000 -#define P4SEG 0x80000000 - -#endif /* __ASM_SH_CPU_SH2A_ADDRSPACE_H */ diff --git a/arch/sh/include/cpu-sh2a/cpu/dma.h b/arch/sh/include/cpu-sh2a/cpu/dma.h index d66b43cdc63..27a13ef4fdf 100644 --- a/arch/sh/include/cpu-sh2a/cpu/dma.h +++ b/arch/sh/include/cpu-sh2a/cpu/dma.h @@ -1,23 +1 @@ -/* - * Definitions for the SH-2 DMAC. - * - * Copyright (C) 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH2_DMA_H -#define __ASM_CPU_SH2_DMA_H - -#define SH_MAX_DMA_CHANNELS 2 - -#define SAR ((unsigned long[]){ 0xffffff80, 0xffffff90 }) -#define DAR ((unsigned long[]){ 0xffffff84, 0xffffff94 }) -#define DMATCR ((unsigned long[]){ 0xffffff88, 0xffffff98 }) -#define CHCR ((unsigned long[]){ 0xfffffffc, 0xffffff9c }) - -#define DMAOR 0xffffffb0 - -#endif /* __ASM_CPU_SH2_DMA_H */ - +#include <cpu-sh2/cpu/dma.h> diff --git a/arch/sh/include/cpu-sh2a/cpu/mmu_context.h b/arch/sh/include/cpu-sh2a/cpu/mmu_context.h deleted file mode 100644 index beeb299e01e..00000000000 --- a/arch/sh/include/cpu-sh2a/cpu/mmu_context.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * include/asm-sh/cpu-sh2/mmu_context.h - * - * Copyright (C) 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH2_MMU_CONTEXT_H -#define __ASM_CPU_SH2_MMU_CONTEXT_H - -/* No MMU */ - -#endif /* __ASM_CPU_SH2_MMU_CONTEXT_H */ - diff --git a/arch/sh/include/cpu-sh2a/cpu/timer.h b/arch/sh/include/cpu-sh2a/cpu/timer.h deleted file mode 100644 index a39c241e819..00000000000 --- a/arch/sh/include/cpu-sh2a/cpu/timer.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_CPU_SH2_TIMER_H -#define __ASM_CPU_SH2_TIMER_H - -/* Nothing needed yet */ - -#endif /* __ASM_CPU_SH2_TIMER_H */ diff --git a/arch/sh/include/cpu-sh2a/cpu/ubc.h b/arch/sh/include/cpu-sh2a/cpu/ubc.h index ba0e87f19c7..8ce2fc1cf62 100644 --- a/arch/sh/include/cpu-sh2a/cpu/ubc.h +++ b/arch/sh/include/cpu-sh2a/cpu/ubc.h @@ -1,32 +1 @@ -/* - * include/asm-sh/cpu-sh2/ubc.h - * - * Copyright (C) 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH2_UBC_H -#define __ASM_CPU_SH2_UBC_H - -#define UBC_BARA 0xffffff40 -#define UBC_BAMRA 0xffffff44 -#define UBC_BBRA 0xffffff48 -#define UBC_BARB 0xffffff60 -#define UBC_BAMRB 0xffffff64 -#define UBC_BBRB 0xffffff68 -#define UBC_BDRB 0xffffff70 -#define UBC_BDMRB 0xffffff74 -#define UBC_BRCR 0xffffff78 - -/* - * We don't have any ASID changes to make in the UBC on the SH-2. - * - * Make these purposely invalid to track misuse. - */ -#define UBC_BASRA 0x00000000 -#define UBC_BASRB 0x00000000 - -#endif /* __ASM_CPU_SH2_UBC_H */ - +#include <cpu-sh2/cpu/ubc.h> diff --git a/arch/sh/include/cpu-sh2a/cpu/watchdog.h b/arch/sh/include/cpu-sh2a/cpu/watchdog.h index 393161c9c6d..e7e8259e468 100644 --- a/arch/sh/include/cpu-sh2a/cpu/watchdog.h +++ b/arch/sh/include/cpu-sh2a/cpu/watchdog.h @@ -1,69 +1 @@ -/* - * include/asm-sh/cpu-sh2/watchdog.h - * - * Copyright (C) 2002, 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH2_WATCHDOG_H -#define __ASM_CPU_SH2_WATCHDOG_H - -/* - * More SH-2 brilliance .. its not good enough that we can't read - * and write the same sizes to WTCNT, now we have to read and write - * with different sizes at different addresses for WTCNT _and_ RSTCSR. - * - * At least on the bright side no one has managed to screw over WTCSR - * in this fashion .. yet. - */ -/* Register definitions */ -#define WTCNT 0xfffffe80 -#define WTCSR 0xfffffe80 -#define RSTCSR 0xfffffe82 - -#define WTCNT_R (WTCNT + 1) -#define RSTCSR_R (RSTCSR + 1) - -/* Bit definitions */ -#define WTCSR_IOVF 0x80 -#define WTCSR_WT 0x40 -#define WTCSR_TME 0x20 -#define WTCSR_RSTS 0x00 - -#define RSTCSR_RSTS 0x20 - -/** - * sh_wdt_read_rstcsr - Read from Reset Control/Status Register - * - * Reads back the RSTCSR value. - */ -static inline __u8 sh_wdt_read_rstcsr(void) -{ - /* - * Same read/write brain-damage as for WTCNT here.. - */ - return ctrl_inb(RSTCSR_R); -} - -/** - * sh_wdt_write_csr - Write to Reset Control/Status Register - * - * @val: Value to write - * - * Writes the given value @val to the lower byte of the control/status - * register. The upper byte is set manually on each write. - */ -static inline void sh_wdt_write_rstcsr(__u8 val) -{ - /* - * Note: Due to the brain-damaged nature of this register, - * we can't presently touch the WOVF bit, since the upper byte - * has to be swapped for this. So just leave it alone.. - */ - ctrl_outw((WTCNT_HIGH << 8) | (__u16)val, RSTCSR); -} - -#endif /* __ASM_CPU_SH2_WATCHDOG_H */ - +#include <cpu-sh2/cpu/watchdog.h> |