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-rw-r--r--sound/pci/oxygen/oxygen.c42
-rw-r--r--sound/pci/oxygen/wm8785.h45
2 files changed, 46 insertions, 41 deletions
diff --git a/sound/pci/oxygen/oxygen.c b/sound/pci/oxygen/oxygen.c
index 9a9941bb046..542752442a9 100644
--- a/sound/pci/oxygen/oxygen.c
+++ b/sound/pci/oxygen/oxygen.c
@@ -40,6 +40,7 @@
#include "oxygen.h"
#include "ak4396.h"
#include "cm9780.h"
+#include "wm8785.h"
MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
MODULE_DESCRIPTION("C-Media CMI8788 driver");
@@ -80,47 +81,6 @@ MODULE_DEVICE_TABLE(pci, oxygen_ids);
#define GPIO_LINE_MUTE CM9780_GPO0
-#define WM8785_R0 0
-#define WM8785_R1 1
-#define WM8785_R2 2
-#define WM8785_R7 7
-
-/* R0 */
-#define WM8785_MCR_MASK 0x007
-#define WM8785_MCR_SLAVE 0x000
-#define WM8785_MCR_MASTER_128 0x001
-#define WM8785_MCR_MASTER_192 0x002
-#define WM8785_MCR_MASTER_256 0x003
-#define WM8785_MCR_MASTER_384 0x004
-#define WM8785_MCR_MASTER_512 0x005
-#define WM8785_MCR_MASTER_768 0x006
-#define WM8785_OSR_MASK 0x018
-#define WM8785_OSR_SINGLE 0x000
-#define WM8785_OSR_DOUBLE 0x008
-#define WM8785_OSR_QUAD 0x010
-#define WM8785_FORMAT_MASK 0x060
-#define WM8785_FORMAT_RJUST 0x000
-#define WM8785_FORMAT_LJUST 0x020
-#define WM8785_FORMAT_I2S 0x040
-#define WM8785_FORMAT_DSP 0x060
-/* R1 */
-#define WM8785_WL_MASK 0x003
-#define WM8785_WL_16 0x000
-#define WM8785_WL_20 0x001
-#define WM8785_WL_24 0x002
-#define WM8785_WL_32 0x003
-#define WM8785_LRP 0x004
-#define WM8785_BCLKINV 0x008
-#define WM8785_LRSWAP 0x010
-#define WM8785_DEVNO_MASK 0x0e0
-/* R2 */
-#define WM8785_HPFR 0x001
-#define WM8785_HPFL 0x002
-#define WM8785_SDODIS 0x004
-#define WM8785_PWRDNR 0x008
-#define WM8785_PWRDNL 0x010
-#define WM8785_TDM_MASK 0x1c0
-
struct generic_data {
u8 ak4396_ctl2;
};
diff --git a/sound/pci/oxygen/wm8785.h b/sound/pci/oxygen/wm8785.h
new file mode 100644
index 00000000000..8c23e315ae6
--- /dev/null
+++ b/sound/pci/oxygen/wm8785.h
@@ -0,0 +1,45 @@
+#ifndef WM8785_H_INCLUDED
+#define WM8785_H_INCLUDED
+
+#define WM8785_R0 0
+#define WM8785_R1 1
+#define WM8785_R2 2
+#define WM8785_R7 7
+
+/* R0 */
+#define WM8785_MCR_MASK 0x007
+#define WM8785_MCR_SLAVE 0x000
+#define WM8785_MCR_MASTER_128 0x001
+#define WM8785_MCR_MASTER_192 0x002
+#define WM8785_MCR_MASTER_256 0x003
+#define WM8785_MCR_MASTER_384 0x004
+#define WM8785_MCR_MASTER_512 0x005
+#define WM8785_MCR_MASTER_768 0x006
+#define WM8785_OSR_MASK 0x018
+#define WM8785_OSR_SINGLE 0x000
+#define WM8785_OSR_DOUBLE 0x008
+#define WM8785_OSR_QUAD 0x010
+#define WM8785_FORMAT_MASK 0x060
+#define WM8785_FORMAT_RJUST 0x000
+#define WM8785_FORMAT_LJUST 0x020
+#define WM8785_FORMAT_I2S 0x040
+#define WM8785_FORMAT_DSP 0x060
+/* R1 */
+#define WM8785_WL_MASK 0x003
+#define WM8785_WL_16 0x000
+#define WM8785_WL_20 0x001
+#define WM8785_WL_24 0x002
+#define WM8785_WL_32 0x003
+#define WM8785_LRP 0x004
+#define WM8785_BCLKINV 0x008
+#define WM8785_LRSWAP 0x010
+#define WM8785_DEVNO_MASK 0x0e0
+/* R2 */
+#define WM8785_HPFR 0x001
+#define WM8785_HPFL 0x002
+#define WM8785_SDODIS 0x004
+#define WM8785_PWRDNR 0x008
+#define WM8785_PWRDNL 0x010
+#define WM8785_TDM_MASK 0x1c0
+
+#endif