diff options
Diffstat (limited to 'arch/arm/mach-h720x')
| -rw-r--r-- | arch/arm/mach-h720x/Kconfig | 38 | ||||
| -rw-r--r-- | arch/arm/mach-h720x/Makefile | 16 | ||||
| -rw-r--r-- | arch/arm/mach-h720x/Makefile.boot | 2 | ||||
| -rw-r--r-- | arch/arm/mach-h720x/common.c | 247 | ||||
| -rw-r--r-- | arch/arm/mach-h720x/common.h | 29 | ||||
| -rw-r--r-- | arch/arm/mach-h720x/cpu-h7201.c | 64 | ||||
| -rw-r--r-- | arch/arm/mach-h720x/cpu-h7202.c | 228 | ||||
| -rw-r--r-- | arch/arm/mach-h720x/h7201-eval.c | 39 | ||||
| -rw-r--r-- | arch/arm/mach-h720x/h7202-eval.c | 81 |
9 files changed, 744 insertions, 0 deletions
diff --git a/arch/arm/mach-h720x/Kconfig b/arch/arm/mach-h720x/Kconfig new file mode 100644 index 00000000000..9b6982efbd2 --- /dev/null +++ b/arch/arm/mach-h720x/Kconfig @@ -0,0 +1,38 @@ +if ARCH_H720X + +menu "h720x Implementations" + +config ARCH_H7201 + bool "gms30c7201" + depends on ARCH_H720X + select CPU_H7201 + help + Say Y here if you are using the Hynix GMS30C7201 Reference Board + +config ARCH_H7202 + bool "hms30c7202" + select CPU_H7202 + depends on ARCH_H720X + help + Say Y here if you are using the Hynix HMS30C7202 Reference Board + +endmenu + +config CPU_H7201 + bool + help + Select code specific to h7201 variants + +config CPU_H7202 + bool + help + Select code specific to h7202 variants +config H7202_SERIAL23 + depends on CPU_H7202 + bool "Use serial ports 2+3" + help + Say Y here if you wish to use serial ports 2+3. They share their + pins with the keyboard matrix controller, so you have to decide. + + +endif diff --git a/arch/arm/mach-h720x/Makefile b/arch/arm/mach-h720x/Makefile new file mode 100644 index 00000000000..e4cf728948e --- /dev/null +++ b/arch/arm/mach-h720x/Makefile @@ -0,0 +1,16 @@ +# +# Makefile for the linux kernel. +# + +# Common support +obj-y := common.o +obj-m := +obj-n := +obj- := + +# Specific board support + +obj-$(CONFIG_ARCH_H7201) += h7201-eval.o +obj-$(CONFIG_ARCH_H7202) += h7202-eval.o +obj-$(CONFIG_CPU_H7201) += cpu-h7201.o +obj-$(CONFIG_CPU_H7202) += cpu-h7202.o diff --git a/arch/arm/mach-h720x/Makefile.boot b/arch/arm/mach-h720x/Makefile.boot new file mode 100644 index 00000000000..52984017bd9 --- /dev/null +++ b/arch/arm/mach-h720x/Makefile.boot @@ -0,0 +1,2 @@ + zreladdr-$(CONFIG_ARCH_H720X) := 0x40008000 + diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c new file mode 100644 index 00000000000..96aa3af70d8 --- /dev/null +++ b/arch/arm/mach-h720x/common.c @@ -0,0 +1,247 @@ +/* + * linux/arch/arm/mach-h720x/common.c + * + * Copyright (C) 2003 Thomas Gleixner <tglx@linutronix.de> + * 2003 Robert Schwebel <r.schwebel@pengutronix.de> + * 2004 Sascha Hauer <s.hauer@pengutronix.de> + * + * common stuff for Hynix h720x processors + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include <linux/sched.h> +#include <linux/slab.h> +#include <linux/mman.h> +#include <linux/init.h> +#include <linux/interrupt.h> + +#include <asm/page.h> +#include <asm/pgtable.h> +#include <asm/dma.h> +#include <asm/io.h> +#include <asm/hardware.h> +#include <asm/irq.h> +#include <asm/mach/irq.h> +#include <asm/mach/map.h> +#include <asm/arch/irqs.h> + +#include <asm/mach/dma.h> + +#if 0 +#define IRQDBG(args...) printk(args) +#else +#define IRQDBG(args...) do {} while(0) +#endif + +void __init arch_dma_init(dma_t *dma) +{ +} + +/* + * Return usecs since last timer reload + * (timercount * (usecs perjiffie)) / (ticks per jiffie) + */ +unsigned long h720x_gettimeoffset(void) +{ + return (CPU_REG (TIMER_VIRT, TM0_COUNT) * tick_usec) / LATCH; +} + +/* + * mask Global irq's + */ +static void mask_global_irq (unsigned int irq ) +{ + CPU_REG (IRQC_VIRT, IRQC_IER) &= ~(1 << irq); +} + +/* + * unmask Global irq's + */ +static void unmask_global_irq (unsigned int irq ) +{ + CPU_REG (IRQC_VIRT, IRQC_IER) |= (1 << irq); +} + + +/* + * ack GPIO irq's + * Ack only for edge triggered int's valid + */ +static void inline ack_gpio_irq(u32 irq) +{ + u32 reg_base = GPIO_VIRT(IRQ_TO_REGNO(irq)); + u32 bit = IRQ_TO_BIT(irq); + if ( (CPU_REG (reg_base, GPIO_EDGE) & bit)) + CPU_REG (reg_base, GPIO_CLR) = bit; +} + +/* + * mask GPIO irq's + */ +static void inline mask_gpio_irq(u32 irq) +{ + u32 reg_base = GPIO_VIRT(IRQ_TO_REGNO(irq)); + u32 bit = IRQ_TO_BIT(irq); + CPU_REG (reg_base, GPIO_MASK) &= ~bit; +} + +/* + * unmask GPIO irq's + */ +static void inline unmask_gpio_irq(u32 irq) +{ + u32 reg_base = GPIO_VIRT(IRQ_TO_REGNO(irq)); + u32 bit = IRQ_TO_BIT(irq); + CPU_REG (reg_base, GPIO_MASK) |= bit; +} + +static void +h720x_gpio_handler(unsigned int mask, unsigned int irq, + struct irqdesc *desc, struct pt_regs *regs) +{ + IRQDBG("%s irq: %d\n",__FUNCTION__,irq); + desc = irq_desc + irq; + while (mask) { + if (mask & 1) { + IRQDBG("handling irq %d\n", irq); + desc->handle(irq, desc, regs); + } + irq++; + desc++; + mask >>= 1; + } +} + +static void +h720x_gpioa_demux_handler(unsigned int irq_unused, struct irqdesc *desc, + struct pt_regs *regs) +{ + unsigned int mask, irq; + + mask = CPU_REG(GPIO_A_VIRT,GPIO_STAT); + irq = IRQ_CHAINED_GPIOA(0); + IRQDBG("%s mask: 0x%08x irq: %d\n",__FUNCTION__,mask,irq); + h720x_gpio_handler(mask, irq, desc, regs); +} + +static void +h720x_gpiob_demux_handler(unsigned int irq_unused, struct irqdesc *desc, + struct pt_regs *regs) +{ + unsigned int mask, irq; + mask = CPU_REG(GPIO_B_VIRT,GPIO_STAT); + irq = IRQ_CHAINED_GPIOB(0); + IRQDBG("%s mask: 0x%08x irq: %d\n",__FUNCTION__,mask,irq); + h720x_gpio_handler(mask, irq, desc, regs); +} + +static void +h720x_gpioc_demux_handler(unsigned int irq_unused, struct irqdesc *desc, + struct pt_regs *regs) +{ + unsigned int mask, irq; + + mask = CPU_REG(GPIO_C_VIRT,GPIO_STAT); + irq = IRQ_CHAINED_GPIOC(0); + IRQDBG("%s mask: 0x%08x irq: %d\n",__FUNCTION__,mask,irq); + h720x_gpio_handler(mask, irq, desc, regs); +} + +static void +h720x_gpiod_demux_handler(unsigned int irq_unused, struct irqdesc *desc, + struct pt_regs *regs) +{ + unsigned int mask, irq; + + mask = CPU_REG(GPIO_D_VIRT,GPIO_STAT); + irq = IRQ_CHAINED_GPIOD(0); + IRQDBG("%s mask: 0x%08x irq: %d\n",__FUNCTION__,mask,irq); + h720x_gpio_handler(mask, irq, desc, regs); +} + +#ifdef CONFIG_CPU_H7202 +static void +h720x_gpioe_demux_handler(unsigned int irq_unused, struct irqdesc *desc, + struct pt_regs *regs) +{ + unsigned int mask, irq; + + mask = CPU_REG(GPIO_E_VIRT,GPIO_STAT); + irq = IRQ_CHAINED_GPIOE(0); + IRQDBG("%s mask: 0x%08x irq: %d\n",__FUNCTION__,mask,irq); + h720x_gpio_handler(mask, irq, desc, regs); +} +#endif + +static struct irqchip h720x_global_chip = { + .ack = mask_global_irq, + .mask = mask_global_irq, + .unmask = unmask_global_irq, +}; + +static struct irqchip h720x_gpio_chip = { + .ack = ack_gpio_irq, + .mask = mask_gpio_irq, + .unmask = unmask_gpio_irq, +}; + +/* + * Initialize IRQ's, mask all, enable multiplexed irq's + */ +void __init h720x_init_irq (void) +{ + int irq; + + /* Mask global irq's */ + CPU_REG (IRQC_VIRT, IRQC_IER) = 0x0; + + /* Mask all multiplexed irq's */ + CPU_REG (GPIO_A_VIRT, GPIO_MASK) = 0x0; + CPU_REG (GPIO_B_VIRT, GPIO_MASK) = 0x0; + CPU_REG (GPIO_C_VIRT, GPIO_MASK) = 0x0; + CPU_REG (GPIO_D_VIRT, GPIO_MASK) = 0x0; + + /* Initialize global IRQ's, fast path */ + for (irq = 0; irq < NR_GLBL_IRQS; irq++) { + set_irq_chip(irq, &h720x_global_chip); + set_irq_handler(irq, do_level_IRQ); + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); + } + + /* Initialize multiplexed IRQ's, slow path */ + for (irq = IRQ_CHAINED_GPIOA(0) ; irq <= IRQ_CHAINED_GPIOD(31); irq++) { + set_irq_chip(irq, &h720x_gpio_chip); + set_irq_handler(irq, do_edge_IRQ); + set_irq_flags(irq, IRQF_VALID ); + } + set_irq_chained_handler(IRQ_GPIOA, h720x_gpioa_demux_handler); + set_irq_chained_handler(IRQ_GPIOB, h720x_gpiob_demux_handler); + set_irq_chained_handler(IRQ_GPIOC, h720x_gpioc_demux_handler); + set_irq_chained_handler(IRQ_GPIOD, h720x_gpiod_demux_handler); + +#ifdef CONFIG_CPU_H7202 + for (irq = IRQ_CHAINED_GPIOE(0) ; irq <= IRQ_CHAINED_GPIOE(31); irq++) { + set_irq_chip(irq, &h720x_gpio_chip); + set_irq_handler(irq, do_edge_IRQ); + set_irq_flags(irq, IRQF_VALID ); + } + set_irq_chained_handler(IRQ_GPIOE, h720x_gpioe_demux_handler); +#endif + + /* Enable multiplexed irq's */ + CPU_REG (IRQC_VIRT, IRQC_IER) = IRQ_ENA_MUX; +} + +static struct map_desc h720x_io_desc[] __initdata = { + { IO_VIRT, IO_PHYS, IO_SIZE, MT_DEVICE }, +}; + +/* Initialize io tables */ +void __init h720x_map_io(void) +{ + iotable_init(h720x_io_desc,ARRAY_SIZE(h720x_io_desc)); +} diff --git a/arch/arm/mach-h720x/common.h b/arch/arm/mach-h720x/common.h new file mode 100644 index 00000000000..d8798dbc44f --- /dev/null +++ b/arch/arm/mach-h720x/common.h @@ -0,0 +1,29 @@ +/* + * linux/arch/arm/mach-h720x/common.h + * + * Copyright (C) 2003 Thomas Gleixner <tglx@linutronix.de> + * 2003 Robert Schwebel <r.schwebel@pengutronix.de> + * 2004 Sascha Hauer <s.hauer@pengutronix.de> + * + * Architecture specific stuff for Hynix GMS30C7201 development board + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +extern unsigned long h720x_gettimeoffset(void); +extern void __init h720x_init_irq (void); +extern void __init h720x_map_io(void); + +#ifdef CONFIG_ARCH_H7202 +extern struct sys_timer h7202_timer; +extern void __init init_hw_h7202(void); +extern void __init h7202_init_irq (void); +extern void __init h7202_init_time(void); +#endif + +#ifdef CONFIG_ARCH_H7201 +extern struct sys_timer h7201_timer; +#endif diff --git a/arch/arm/mach-h720x/cpu-h7201.c b/arch/arm/mach-h720x/cpu-h7201.c new file mode 100644 index 00000000000..743656881ed --- /dev/null +++ b/arch/arm/mach-h720x/cpu-h7201.c @@ -0,0 +1,64 @@ +/* + * linux/arch/arm/mach-h720x/cpu-h7201.c + * + * Copyright (C) 2003 Thomas Gleixner <tglx@linutronix.de> + * 2003 Robert Schwebel <r.schwebel@pengutronix.de> + * 2004 Sascha Hauer <s.hauer@pengutronix.de> + * + * processor specific stuff for the Hynix h7201 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/module.h> +#include <asm/types.h> +#include <asm/hardware.h> +#include <asm/irq.h> +#include <asm/arch/irqs.h> +#include <asm/mach/irq.h> +#include <asm/mach/time.h> +#include "common.h" +/* + * Timer interrupt handler + */ +static irqreturn_t +h7201_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) +{ + write_seqlock(&xtime_lock); + + CPU_REG (TIMER_VIRT, TIMER_TOPSTAT); + timer_tick(regs); + + write_sequnlock(&xtime_lock); + + return IRQ_HANDLED; +} + +static struct irqaction h7201_timer_irq = { + .name = "h7201 Timer Tick", + .flags = SA_INTERRUPT, + .handler = h7201_timer_interrupt +}; + +/* + * Setup TIMER0 as system timer + */ +void __init h7201_init_time(void) +{ + CPU_REG (TIMER_VIRT, TM0_PERIOD) = LATCH; + CPU_REG (TIMER_VIRT, TM0_CTRL) = TM_RESET; + CPU_REG (TIMER_VIRT, TM0_CTRL) = TM_REPEAT | TM_START; + CPU_REG (TIMER_VIRT, TIMER_TOPCTRL) = ENABLE_TM0_INTR | TIMER_ENABLE_BIT; + + setup_irq(IRQ_TIMER0, &h7201_timer_irq); +} + +struct sys_timer h7201_timer = { + .init = h7201_init_time, + .offset = h720x_gettimeoffset, +}; diff --git a/arch/arm/mach-h720x/cpu-h7202.c b/arch/arm/mach-h720x/cpu-h7202.c new file mode 100644 index 00000000000..21b8fb6122c --- /dev/null +++ b/arch/arm/mach-h720x/cpu-h7202.c @@ -0,0 +1,228 @@ +/* + * linux/arch/arm/mach-h720x/cpu-h7202.c + * + * Copyright (C) 2003 Thomas Gleixner <tglx@linutronix.de> + * 2003 Robert Schwebel <r.schwebel@pengutronix.de> + * 2004 Sascha Hauer <s.hauer@pengutronix.de> + * + * processor specific stuff for the Hynix h7202 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/module.h> +#include <asm/types.h> +#include <asm/hardware.h> +#include <asm/irq.h> +#include <asm/arch/irqs.h> +#include <asm/mach/irq.h> +#include <asm/mach/time.h> +#include <linux/device.h> +#include <linux/serial_8250.h> +#include "common.h" + +static struct resource h7202ps2_resources[] = { + [0] = { + .start = 0x8002c000, + .end = 0x8002c040, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_PS2, + .end = IRQ_PS2, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device h7202ps2_device = { + .name = "h7202ps2", + .id = -1, + .num_resources = ARRAY_SIZE(h7202ps2_resources), + .resource = h7202ps2_resources, +}; + +static struct plat_serial8250_port serial_platform_data[] = { + { + .membase = (void*)SERIAL0_VIRT, + .mapbase = SERIAL0_BASE, + .irq = IRQ_UART0, + .uartclk = 2*1843200, + .regshift = 2, + .iotype = UPIO_MEM, + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, + }, + { + .membase = (void*)SERIAL1_VIRT, + .mapbase = SERIAL1_BASE, + .irq = IRQ_UART1, + .uartclk = 2*1843200, + .regshift = 2, + .iotype = UPIO_MEM, + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, + }, +#ifdef CONFIG_H7202_SERIAL23 + { + .membase = (void*)SERIAL2_VIRT, + .mapbase = SERIAL2_BASE, + .irq = IRQ_UART2, + .uartclk = 2*1843200, + .regshift = 2, + .iotype = UPIO_MEM, + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, + }, + { + .membase = (void*)SERIAL3_VIRT, + .mapbase = SERIAL3_BASE, + .irq = IRQ_UART3, + .uartclk = 2*1843200, + .regshift = 2, + .iotype = UPIO_MEM, + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, + }, +#endif + { }, +}; + +static struct platform_device serial_device = { + .name = "serial8250", + .id = 0, + .dev = { + .platform_data = serial_platform_data, + }, +}; + +static struct platform_device *devices[] __initdata = { + &h7202ps2_device, + &serial_device, +}; + +/* Although we have two interrupt lines for the timers, we only have one + * status register which clears all pending timer interrupts on reading. So + * we have to handle all timer interrupts in one place. + */ +static void +h7202_timerx_demux_handler(unsigned int irq_unused, struct irqdesc *desc, + struct pt_regs *regs) +{ + unsigned int mask, irq; + + mask = CPU_REG (TIMER_VIRT, TIMER_TOPSTAT); + + if ( mask & TSTAT_T0INT ) { + write_seqlock(&xtime_lock); + timer_tick(regs); + write_sequnlock(&xtime_lock); + if( mask == TSTAT_T0INT ) + return; + } + + mask >>= 1; + irq = IRQ_TIMER1; + desc = irq_desc + irq; + while (mask) { + if (mask & 1) + desc->handle(irq, desc, regs); + irq++; + desc++; + mask >>= 1; + } +} + +/* + * Timer interrupt handler + */ +static irqreturn_t +h7202_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) +{ + h7202_timerx_demux_handler(0, NULL, regs); + return IRQ_HANDLED; +} + +/* + * mask multiplexed timer irq's + */ +static void inline mask_timerx_irq (u32 irq) +{ + unsigned int bit; + bit = 2 << ((irq == IRQ_TIMER64B) ? 4 : (irq - IRQ_TIMER1)); + CPU_REG (TIMER_VIRT, TIMER_TOPCTRL) &= ~bit; +} + +/* + * unmask multiplexed timer irq's + */ +static void inline unmask_timerx_irq (u32 irq) +{ + unsigned int bit; + bit = 2 << ((irq == IRQ_TIMER64B) ? 4 : (irq - IRQ_TIMER1)); + CPU_REG (TIMER_VIRT, TIMER_TOPCTRL) |= bit; +} + +static struct irqchip h7202_timerx_chip = { + .ack = mask_timerx_irq, + .mask = mask_timerx_irq, + .unmask = unmask_timerx_irq, +}; + +static struct irqaction h7202_timer_irq = { + .name = "h7202 Timer Tick", + .flags = SA_INTERRUPT, + .handler = h7202_timer_interrupt +}; + +/* + * Setup TIMER0 as system timer + */ +void __init h7202_init_time(void) +{ + CPU_REG (TIMER_VIRT, TM0_PERIOD) = LATCH; + CPU_REG (TIMER_VIRT, TM0_CTRL) = TM_RESET; + CPU_REG (TIMER_VIRT, TM0_CTRL) = TM_REPEAT | TM_START; + CPU_REG (TIMER_VIRT, TIMER_TOPCTRL) = ENABLE_TM0_INTR | TIMER_ENABLE_BIT; + + setup_irq(IRQ_TIMER0, &h7202_timer_irq); +} + +struct sys_timer h7202_timer = { + .init = h7202_init_time, + .offset = h720x_gettimeoffset, +}; + +void __init h7202_init_irq (void) +{ + int irq; + + CPU_REG (GPIO_E_VIRT, GPIO_MASK) = 0x0; + + for (irq = IRQ_TIMER1; + irq < IRQ_CHAINED_TIMERX(NR_TIMERX_IRQS); irq++) { + mask_timerx_irq(irq); + set_irq_chip(irq, &h7202_timerx_chip); + set_irq_handler(irq, do_edge_IRQ); + set_irq_flags(irq, IRQF_VALID ); + } + set_irq_chained_handler(IRQ_TIMERX, h7202_timerx_demux_handler); + + h720x_init_irq(); +} + +void __init init_hw_h7202(void) +{ + /* Enable clocks */ + CPU_REG (PMU_BASE, PMU_PLL_CTRL) |= PLL_2_EN | PLL_1_EN | PLL_3_MUTE; + + CPU_REG (SERIAL0_VIRT, SERIAL_ENABLE) = SERIAL_ENABLE_EN; + CPU_REG (SERIAL1_VIRT, SERIAL_ENABLE) = SERIAL_ENABLE_EN; +#ifdef CONFIG_H7202_SERIAL23 + CPU_REG (SERIAL2_VIRT, SERIAL_ENABLE) = SERIAL_ENABLE_EN; + CPU_REG (SERIAL3_VIRT, SERIAL_ENABLE) = SERIAL_ENABLE_EN; + CPU_IO (GPIO_AMULSEL) = AMULSEL_USIN2 | AMULSEL_USOUT2 | + AMULSEL_USIN3 | AMULSEL_USOUT3; +#endif + (void) platform_add_devices(devices, ARRAY_SIZE(devices)); +} diff --git a/arch/arm/mach-h720x/h7201-eval.c b/arch/arm/mach-h720x/h7201-eval.c new file mode 100644 index 00000000000..9b24b9b0db1 --- /dev/null +++ b/arch/arm/mach-h720x/h7201-eval.c @@ -0,0 +1,39 @@ +/* + * linux/arch/arm/mach-h720x/h7201-eval.c + * + * Copyright (C) 2003 Thomas Gleixner <tglx@linutronix.de> + * 2003 Robert Schwebel <r.schwebel@pengutronix.de> + * 2004 Sascha Hauer <s.hauer@pengutronix.de> + * + * Architecture specific stuff for Hynix GMS30C7201 development board + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include <linux/config.h> +#include <linux/init.h> +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/string.h> +#include <linux/device.h> + +#include <asm/setup.h> +#include <asm/types.h> +#include <asm/mach-types.h> +#include <asm/page.h> +#include <asm/pgtable.h> +#include <asm/mach/arch.h> +#include <asm/hardware.h> +#include "common.h" + +MACHINE_START(H7201, "Hynix GMS30C7201") + MAINTAINER("Robert Schwebel, Pengutronix") + BOOT_MEM(0x40000000, 0x80000000, 0xf0000000) + BOOT_PARAMS(0xc0001000) + MAPIO(h720x_map_io) + INITIRQ(h720x_init_irq) + .timer = &h7201_timer, +MACHINE_END diff --git a/arch/arm/mach-h720x/h7202-eval.c b/arch/arm/mach-h720x/h7202-eval.c new file mode 100644 index 00000000000..3456a00d5f5 --- /dev/null +++ b/arch/arm/mach-h720x/h7202-eval.c @@ -0,0 +1,81 @@ +/* + * linux/arch/arm/mach-h720x/h7202-eval.c + * + * Copyright (C) 2003 Thomas Gleixner <tglx@linutronix.de> + * 2003 Robert Schwebel <r.schwebel@pengutronix.de> + * 2004 Sascha Hauer <s.hauer@pengutronix.de> + * + * Architecture specific stuff for Hynix HMS30C7202 development board + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include <linux/config.h> +#include <linux/init.h> +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/string.h> +#include <linux/device.h> + +#include <asm/setup.h> +#include <asm/types.h> +#include <asm/mach-types.h> +#include <asm/page.h> +#include <asm/pgtable.h> +#include <asm/mach/arch.h> +#include <asm/hardware.h> +#include "common.h" + +static struct resource cirrus_resources[] = { + [0] = { + .start = ETH0_PHYS + 0x300, + .end = ETH0_PHYS + 0x300 + 0x10, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_CHAINED_GPIOB(8), + .end = IRQ_CHAINED_GPIOB(8), + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device cirrus_device = { + .name = "cirrus-cs89x0", + .id = -1, + .num_resources = ARRAY_SIZE(cirrus_resources), + .resource = cirrus_resources, +}; + +static struct platform_device *devices[] __initdata = { + &cirrus_device, +}; + +/* + * Hardware init. This is called early in initcalls + * Place pin inits here. So you avoid adding ugly + * #ifdef stuff to common drivers. + * Use this only, if your bootloader is not able + * to initialize the pins proper. + */ +static void __init init_eval_h7202(void) +{ + init_hw_h7202(); + (void) platform_add_devices(devices, ARRAY_SIZE(devices)); + + /* Enable interrupt on portb bit 8 (ethernet) */ + CPU_REG (GPIO_B_VIRT, GPIO_POL) &= ~(1 << 8); + CPU_REG (GPIO_B_VIRT, GPIO_EN) |= (1 << 8); +} + +MACHINE_START(H7202, "Hynix HMS30C7202") + MAINTAINER("Robert Schwebel, Pengutronix") + BOOT_MEM(0x40000000, 0x80000000, 0xf0000000) + BOOT_PARAMS(0x40000100) + MAPIO(h720x_map_io) + INITIRQ(h7202_init_irq) + .timer = &h7202_timer, + INIT_MACHINE(init_eval_h7202) +MACHINE_END |