diff options
Diffstat (limited to 'arch/arm/mach-s3c6410/include/mach/om-3d7k.h')
| -rw-r--r-- | arch/arm/mach-s3c6410/include/mach/om-3d7k.h | 98 |
1 files changed, 98 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c6410/include/mach/om-3d7k.h b/arch/arm/mach-s3c6410/include/mach/om-3d7k.h new file mode 100644 index 00000000000..1e8b1649d20 --- /dev/null +++ b/arch/arm/mach-s3c6410/include/mach/om-3d7k.h @@ -0,0 +1,98 @@ +/* + * 3D7K GPIO Mappings + * + * (C) 2008 by Openmoko Inc. + * Author: Andy Green <andy@openmoko.com> + * All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation + * + */ + +#ifndef _OM_3D7K_H +#define _OM_3D7K_H + +#include <mach/gpio.h> +#include <mach/irqs.h> +#include <linux/mfd/pcf50633/core.h> + +extern struct pcf50633 *om_3d7k_pcf; + +/* ATAG_REVISION from bootloader */ +#define OM_3D7Kv1_SYSTEM_REV 0x00000001 + +#define OM_3D7K_GPIO_VIBRATOR_ON S3C64XX_GPF(13) +#define OM_3D7K_GPIO_CLKOUT S3C64XX_GPF(14) + +#define OM_3D7K_GPIO_ACCEL_MISO S3C64XX_GPC(0) +#define OM_3D7K_GPIO_ACCEL_CLK S3C64XX_GPC(1) +#define OM_3D7K_GPIO_ACCEL_MOSI S3C64XX_GPC(2) + +#define OM_3D7K_GPIO_LCM_MISO S3C64XX_GPC(4) +#define OM_3D7K_GPIO_LCM_CLK S3C64XX_GPC(5) +#define OM_3D7K_GPIO_LCM_MOSI S3C64XX_GPC(6) +#define OM_3D7K_GPIO_LCM_CS S3C64XX_GPC(7) + +#define OM_3D7K_GPIO_BTPCM_SHARED_SCLK S3C64XX_GPE(0) +#define OM_3D7K_GPIO_BTPCM_SHARED_EXTCLK S3C64XX_GPE(1) +#define OM_3D7K_GPIO_BTPCM_SHARED_FSYNC S3C64XX_GPE(2) +#define OM_3D7K_GPIO_BTPCM_SHARED_SIN S3C64XX_GPE(3) +#define OM_3D7K_GPIO_BTPCM_SHARED_SOUT S3C64XX_GPE(4) + +#define OM_3D7K_GPIO_WLAN_RESET S3C64XX_GPH(6) +#define OM_3D7K_GPIO_HDQ S3C64XX_GPH(7) +#define OM_3D7K_GPIO_WLAN_PWRDN S3C64XX_GPH(8) + +#define OM_3D7K_GPIO_VERSION2 S3C64XX_GPI(0) +#define OM_3D7K_GPIO_VERSION1 S3C64XX_GPI(1) +#define OM_3D7K_GPIO_VERSION0 S3C64XX_GPI(8) + +#define OM_3D7K_GPIO_NWLAN_POWER S3C64XX_GPK(0) +#define OM_3D7K_GPIO_MODEM_ON S3C64XX_GPK(2) +#define OM_3D7K_GPIO_LED_TRIG S3C64XX_GPK(3) +#define OM_3D7K_GPIO_LED_EN S3C64XX_GPK(4) +#define OM_3D7K_GPIO_LCM_RESET S3C64XX_GPK(6) + +#define OM_3D7K_GPIO_LCM_SD S3C64XX_GPL(0) + +#define OM_3D7K_GPIO_TP_RESET S3C64XX_GPM(0) +#define OM_3D7K_GPIO_GPS_LNA_EN S3C64XX_GPM(2) + +#define OM_3D7K_GPIO_USB_FLT S3C64XX_GPM(4) +#define OM_3D7K_GPIO_USB_OC S3C64XX_GPM(5) + +#define OM_3D7K_GPIO_ACCEL_INT1 S3C64XX_GPN(0) +#define OM_3D7K_GPIO_KEY_MINUS S3C64XX_GPN(1) +#define OM_3D7K_GPIO_KEY_PLUS S3C64XX_GPN(2) +#define OM_3D7K_GPIO_PWR_IND S3C64XX_GPN(3) +#define OM_3D7K_GPIO_PWR_IRQ S3C64XX_GPN(4) +#define OM_3D7K_GPIO_TOUCH S3C64XX_GPN(5) +#define OM_3D7K_GPIO_JACK_INSERT S3C64XX_GPN(6) +#define OM_3D7K_GPIO_GPS_INT S3C64XX_GPN(7) +#define OM_3D7K_GPIO_HOLD S3C64XX_GPN(8) +#define OM_3D7K_GPIO_WLAN_WAKEUP S3C64XX_GPN(9) +#define OM_3D7K_GPIO_ACCEL_INT2 S3C64XX_GPN(10) +#define OM_3D7K_GPIO_IO1 S3C64XX_GPN(11) +#define OM_3D7K_GPIO_NONKEYWAKE S3C64XX_GPN(12) + +#define OM_3D7K_GPIO_N_MODEM_RESET S3C64XX_GPO(1) + +#define OM_3D7K_IRQ_GSENSOR_1 S3C_EINT(0) +#define OM_3D7K_IRQ_KEY_MINUS S3C_EINT(1) +#define OM_3D7K_IRQ_KEY_PLUS S3C_EINT(2) +#define OM_3D7K_IRQ_PWR_IND S3C_EINT(3) +#define OM_3D7K_IRQ_PMU S3C_EINT(4) +#define OM_3D7K_IRQ_TOUCH S3C_EINT(5) +#define OM_3D7K_IRQ_JACK_INSERT S3C_EINT(6) +#define OM_3D7K_IRQ_GPS_INT S3C_EINT(7) +#define OM_3D7K_IRQ_NHOLD S3C_EINT(8) +#define OM_3D7K_IRQ_WLAN_WAKEUP S3C_EINT(9) +#define OM_3D7K_IRQ_GSENSOR_2 S3C_EINT(10) +#define OM_3D7K_IRQ_IO1 S3C_EINT(11) +#define OM_3D7K_IRQ_NONKEYWAKE S3C_EINT(12) + +#define OM_3D7K_IRQ_LED IRQ_EINT_GROUP(6, 9) + +#endif /* _OM_3D7K_H */ |