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-rw-r--r--arch/arm26/Kconfig6
-rw-r--r--arch/arm26/kernel/fiq.c32
-rw-r--r--arch/arm26/kernel/signal.c3
3 files changed, 22 insertions, 19 deletions
diff --git a/arch/arm26/Kconfig b/arch/arm26/Kconfig
index 274e07019b4..dee23d87fc5 100644
--- a/arch/arm26/Kconfig
+++ b/arch/arm26/Kconfig
@@ -53,14 +53,14 @@ config GENERIC_ISA_DMA
config ARCH_MAY_HAVE_PC_FDC
bool
- default y
source "init/Kconfig"
menu "System Type"
-comment "Archimedes/A5000 Implementations (select only ONE)"
+choice
+ prompt "Archimedes/A5000 Implementations"
config ARCH_ARC
bool "Archimedes"
@@ -73,6 +73,7 @@ config ARCH_ARC
config ARCH_A5K
bool "A5000"
+ select ARCH_MAY_HAVE_PC_FDC
help
Say Y here to to support the Acorn A5000.
@@ -87,6 +88,7 @@ config PAGESIZE_16
Say Y here if your Archimedes or A5000 system has only 2MB of
memory, otherwise say N. The resulting kernel will not run on a
machine with 4MB of memory.
+endchoice
endmenu
config ISA_DMA_API
diff --git a/arch/arm26/kernel/fiq.c b/arch/arm26/kernel/fiq.c
index 08a97c9498f..a24272b61f3 100644
--- a/arch/arm26/kernel/fiq.c
+++ b/arch/arm26/kernel/fiq.c
@@ -104,14 +104,14 @@ void set_fiq_regs(struct pt_regs *regs)
{
register unsigned long tmp, tmp2;
__asm__ volatile (
- "mov %0, pc
- bic %1, %0, #0x3
- orr %1, %1, %3
- teqp %1, #0 @ select FIQ mode
- mov r0, r0
- ldmia %2, {r8 - r14}
- teqp %0, #0 @ return to SVC mode
- mov r0, r0"
+ "mov %0, pc \n"
+ "bic %1, %0, #0x3 \n"
+ "orr %1, %1, %3 \n"
+ "teqp %1, #0 @ select FIQ mode \n"
+ "mov r0, r0 \n"
+ "ldmia %2, {r8 - r14} \n"
+ "teqp %0, #0 @ return to SVC mode \n"
+ "mov r0, r0 "
: "=&r" (tmp), "=&r" (tmp2)
: "r" (&regs->ARM_r8), "I" (PSR_I_BIT | PSR_F_BIT | MODE_FIQ26)
/* These registers aren't modified by the above code in a way
@@ -125,14 +125,14 @@ void get_fiq_regs(struct pt_regs *regs)
{
register unsigned long tmp, tmp2;
__asm__ volatile (
- "mov %0, pc
- bic %1, %0, #0x3
- orr %1, %1, %3
- teqp %1, #0 @ select FIQ mode
- mov r0, r0
- stmia %2, {r8 - r14}
- teqp %0, #0 @ return to SVC mode
- mov r0, r0"
+ "mov %0, pc \n"
+ "bic %1, %0, #0x3 \n"
+ "orr %1, %1, %3 \n"
+ "teqp %1, #0 @ select FIQ mode \n"
+ "mov r0, r0 \n"
+ "stmia %2, {r8 - r14} \n"
+ "teqp %0, #0 @ return to SVC mode \n"
+ "mov r0, r0 "
: "=&r" (tmp), "=&r" (tmp2)
: "r" (&regs->ARM_r8), "I" (PSR_I_BIT | PSR_F_BIT | MODE_FIQ26)
/* These registers aren't modified by the above code in a way
diff --git a/arch/arm26/kernel/signal.c b/arch/arm26/kernel/signal.c
index ce2055bdc9e..2a48c12100c 100644
--- a/arch/arm26/kernel/signal.c
+++ b/arch/arm26/kernel/signal.c
@@ -480,6 +480,7 @@ static int do_signal(sigset_t *oldset, struct pt_regs *regs, int syscall)
{
siginfo_t info;
int signr;
+ struct k_sigaction ka;
/*
* We want the common case to go fast, which
@@ -493,7 +494,7 @@ static int do_signal(sigset_t *oldset, struct pt_regs *regs, int syscall)
if (current->ptrace & PT_SINGLESTEP)
ptrace_cancel_bpt(current);
- signr = get_signal_to_deliver(&info, regs, NULL);
+ signr = get_signal_to_deliver(&info, &ka, regs, NULL);
if (signr > 0) {
handle_signal(signr, &info, oldset, regs, syscall);
if (current->ptrace & PT_SINGLESTEP)