diff options
Diffstat (limited to 'arch/mips/mips-boards/malta')
| -rw-r--r-- | arch/mips/mips-boards/malta/Makefile | 2 | ||||
| -rw-r--r-- | arch/mips/mips-boards/malta/malta_int.c | 12 | ||||
| -rw-r--r-- | arch/mips/mips-boards/malta/malta_smtc.c | 2 |
3 files changed, 15 insertions, 1 deletions
diff --git a/arch/mips/mips-boards/malta/Makefile b/arch/mips/mips-boards/malta/Makefile index a242b0fc377..931ca4600a6 100644 --- a/arch/mips/mips-boards/malta/Makefile +++ b/arch/mips/mips-boards/malta/Makefile @@ -23,3 +23,5 @@ obj-y := malta_int.o malta_platform.o malta_setup.o obj-$(CONFIG_MTD) += malta_mtd.o obj-$(CONFIG_MIPS_MT_SMTC) += malta_smtc.o + +EXTRA_CFLAGS += -Werror diff --git a/arch/mips/mips-boards/malta/malta_int.c b/arch/mips/mips-boards/malta/malta_int.c index c78d4834960..97aeb8c4e60 100644 --- a/arch/mips/mips-boards/malta/malta_int.c +++ b/arch/mips/mips-boards/malta/malta_int.c @@ -330,6 +330,18 @@ void __init arch_init_irq(void) (0x100 << MIPSCPU_INT_I8259A)); setup_irq_smtc (MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI, &corehi_irqaction, (0x100 << MIPSCPU_INT_COREHI)); + /* + * Temporary hack to ensure that the subsidiary device + * interrupts coing in via the i8259A, but associated + * with low IRQ numbers, will restore the Status.IM + * value associated with the i8259A. + */ + { + int i; + + for (i = 0; i < 16; i++) + irq_hwmask[i] = (0x100 << MIPSCPU_INT_I8259A); + } #else /* Not SMTC */ setup_irq (MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq); setup_irq (MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI, &corehi_irqaction); diff --git a/arch/mips/mips-boards/malta/malta_smtc.c b/arch/mips/mips-boards/malta/malta_smtc.c index d1c80f63110..0fb4c269901 100644 --- a/arch/mips/mips-boards/malta/malta_smtc.c +++ b/arch/mips/mips-boards/malta/malta_smtc.c @@ -58,7 +58,7 @@ void prom_init_secondary(void) * but it may be multithreaded. */ -void plat_smp_setup(void) +void __cpuinit plat_smp_setup(void) { if (read_c0_config3() & (1<<2)) mipsmt_build_cpu_map(0); |