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-rw-r--r--arch/mips/pci/Makefile2
-rw-r--r--arch/mips/pci/fixup-capcella.c2
-rw-r--r--arch/mips/pci/fixup-mpc30x.c2
-rw-r--r--arch/mips/pci/fixup-tb0219.c2
-rw-r--r--arch/mips/pci/fixup-tb0226.c2
-rw-r--r--arch/mips/pci/fixup-tb0287.c2
-rw-r--r--arch/mips/pci/ops-tx3927.c114
-rw-r--r--arch/mips/pci/ops-vr41xx.c2
-rw-r--r--arch/mips/pci/pci-jmr3927.c2
-rw-r--r--arch/mips/pci/pci-vr41xx.c2
-rw-r--r--arch/mips/pci/pci-vr41xx.h2
11 files changed, 53 insertions, 81 deletions
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index 7b746830402..741e67c9195 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -15,7 +15,7 @@ obj-$(CONFIG_MIPS_GT96100) += ops-gt96100.o
obj-$(CONFIG_PCI_MARVELL) += ops-marvell.o
obj-$(CONFIG_MIPS_MSC) += ops-msc.o
obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o
-obj-$(CONFIG_MIPS_TX3927) += ops-jmr3927.o
+obj-$(CONFIG_MIPS_TX3927) += ops-tx3927.o
obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o pci-vr41xx.o
obj-$(CONFIG_NEC_CMBVR4133) += fixup-vr4133.o
diff --git a/arch/mips/pci/fixup-capcella.c b/arch/mips/pci/fixup-capcella.c
index f2fc82c1c7c..1e530751936 100644
--- a/arch/mips/pci/fixup-capcella.c
+++ b/arch/mips/pci/fixup-capcella.c
@@ -1,7 +1,7 @@
/*
* fixup-cappcela.c, The ZAO Networks Capcella specific PCI fixups.
*
- * Copyright (C) 2002,2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * Copyright (C) 2002,2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/pci/fixup-mpc30x.c b/arch/mips/pci/fixup-mpc30x.c
index 4975846da75..b67ddaa4712 100644
--- a/arch/mips/pci/fixup-mpc30x.c
+++ b/arch/mips/pci/fixup-mpc30x.c
@@ -1,7 +1,7 @@
/*
* fixup-mpc30x.c, The Victor MP-C303/304 specific PCI fixups.
*
- * Copyright (C) 2002,2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * Copyright (C) 2002,2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/pci/fixup-tb0219.c b/arch/mips/pci/fixup-tb0219.c
index bc55b06e190..734f2b71e16 100644
--- a/arch/mips/pci/fixup-tb0219.c
+++ b/arch/mips/pci/fixup-tb0219.c
@@ -2,7 +2,7 @@
* fixup-tb0219.c, The TANBAC TB0219 specific PCI fixups.
*
* Copyright (C) 2003 Megasolution Inc. <matsu@megasolution.jp>
- * Copyright (C) 2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * Copyright (C) 2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/pci/fixup-tb0226.c b/arch/mips/pci/fixup-tb0226.c
index b5d42b12de1..c9e7cb4361a 100644
--- a/arch/mips/pci/fixup-tb0226.c
+++ b/arch/mips/pci/fixup-tb0226.c
@@ -1,7 +1,7 @@
/*
* fixup-tb0226.c, The TANBAC TB0226 specific PCI fixups.
*
- * Copyright (C) 2002-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * Copyright (C) 2002-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/pci/fixup-tb0287.c b/arch/mips/pci/fixup-tb0287.c
index 8436d7f1fdb..fbe6bcb2819 100644
--- a/arch/mips/pci/fixup-tb0287.c
+++ b/arch/mips/pci/fixup-tb0287.c
@@ -1,7 +1,7 @@
/*
* fixup-tb0287.c, The TANBAC TB0287 specific PCI fixups.
*
- * Copyright (C) 2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * Copyright (C) 2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/pci/ops-tx3927.c b/arch/mips/pci/ops-tx3927.c
index 0e0daadc303..42530a0b84b 100644
--- a/arch/mips/pci/ops-tx3927.c
+++ b/arch/mips/pci/ops-tx3927.c
@@ -72,13 +72,9 @@ static inline int check_abort(void)
static int jmr3927_pci_read_config(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 * val)
{
- int ret, busno;
+ int ret;
- /* check if the bus is top-level */
- if (bus->parent != NULL)
- busno = bus->number;
-
- ret = mkaddr(busno, devfn, where);
+ ret = mkaddr(bus->number, devfn, where);
if (ret)
return ret;
@@ -102,15 +98,9 @@ static int jmr3927_pci_read_config(struct pci_bus *bus, unsigned int devfn,
static int jmr3927_pci_write_config(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 val)
{
- int ret, busno;
-
- /* check if the bus is top-level */
- if (bus->parent != NULL)
- bus = bus->number;
- else
- bus = 0;
+ int ret;
- ret = mkaddr(busno, devfn, where);
+ ret = mkaddr(bus->number, devfn, where);
if (ret)
return ret;
@@ -120,7 +110,7 @@ static int jmr3927_pci_write_config(struct pci_bus *bus, unsigned int devfn,
break;
case 2:
- *(volatile u16 *) (unsigned longulong) & tx3927_pcicptr->icd | (where & 2)) =
+ *(volatile u16 *) ((unsigned long) & tx3927_pcicptr->icd | (where & 2)) =
cpu_to_le16(val);
break;
@@ -137,8 +127,8 @@ static int jmr3927_pci_write_config(struct pci_bus *bus, unsigned int devfn,
}
struct pci_ops jmr3927_pci_ops = {
- jmr3927_pcibios_read_config,
- jmr3927_pcibios_write_config,
+ jmr3927_pci_read_config,
+ jmr3927_pci_write_config,
};
@@ -159,15 +149,14 @@ unsigned long tc_readl(volatile __u32 * addr)
{
unsigned long val;
- addr = PHYSADDR(addr);
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipciaddr =
- (unsigned long) addr;
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcibe =
+ *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
+ (unsigned long) CPHYSADDR(addr);
+ *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
(PCI_IPCIBE_ICMD_MEMREAD << PCI_IPCIBE_ICMD_SHIFT) |
PCI_IPCIBE_IBE_LONG;
while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
val =
- le32_to_cpu(*(volatile u32 *) (ulong) & tx3927_pcicptr->
+ le32_to_cpu(*(volatile u32 *) (unsigned long) & tx3927_pcicptr->
ipcidata);
/* clear by setting */
tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
@@ -176,12 +165,11 @@ unsigned long tc_readl(volatile __u32 * addr)
void tc_writel(unsigned long data, volatile __u32 * addr)
{
- addr = PHYSADDR(addr);
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcidata =
+ *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcidata =
cpu_to_le32(data);
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipciaddr =
- (unsigned long) addr;
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcibe =
+ *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
+ (unsigned long) CPHYSADDR(addr);
+ *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
(PCI_IPCIBE_ICMD_MEMWRITE << PCI_IPCIBE_ICMD_SHIFT) |
PCI_IPCIBE_IBE_LONG;
while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
@@ -198,21 +186,15 @@ unsigned char tx_ioinb(unsigned char *addr)
ioaddr = (unsigned long) addr;
offset = ioaddr & 0x3;
- if (offset == 0)
- byte = 0x7;
- else if (offset == 1)
- byte = 0xb;
- else if (offset == 2)
- byte = 0xd;
- else if (offset == 3)
- byte = 0xe;
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipciaddr =
+ byte = 0xf & ~(8 >> offset);
+
+ *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
(unsigned long) ioaddr;
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcibe =
+ *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
(PCI_IPCIBE_ICMD_IOREAD << PCI_IPCIBE_ICMD_SHIFT) | byte;
while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
val =
- le32_to_cpu(*(volatile u32 *) (ulong) & tx3927_pcicptr->
+ le32_to_cpu(*(volatile u32 *) (unsigned long) & tx3927_pcicptr->
ipcidata);
val = val & 0xff;
/* clear by setting */
@@ -229,18 +211,12 @@ void tx_iooutb(unsigned long data, unsigned char *addr)
data = data | (data << 8) | (data << 16) | (data << 24);
ioaddr = (unsigned long) addr;
offset = ioaddr & 0x3;
- if (offset == 0)
- byte = 0x7;
- else if (offset == 1)
- byte = 0xb;
- else if (offset == 2)
- byte = 0xd;
- else if (offset == 3)
- byte = 0xe;
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcidata = data;
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipciaddr =
+ byte = 0xf & ~(8 >> offset);
+
+ *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcidata = data;
+ *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
(unsigned long) ioaddr;
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcibe =
+ *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
(PCI_IPCIBE_ICMD_IOWRITE << PCI_IPCIBE_ICMD_SHIFT) | byte;
while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
/* clear by setting */
@@ -255,18 +231,16 @@ unsigned short tx_ioinw(unsigned short *addr)
int byte;
ioaddr = (unsigned long) addr;
- offset = ioaddr & 0x3;
- if (offset == 0)
- byte = 0x3;
- else if (offset == 2)
- byte = 0xc;
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipciaddr =
+ offset = ioaddr & 0x2;
+ byte = 3 << offset;
+
+ *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
(unsigned long) ioaddr;
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcibe =
+ *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
(PCI_IPCIBE_ICMD_IOREAD << PCI_IPCIBE_ICMD_SHIFT) | byte;
while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
val =
- le32_to_cpu(*(volatile u32 *) (ulong) & tx3927_pcicptr->
+ le32_to_cpu(*(volatile u32 *) (unsigned long) & tx3927_pcicptr->
ipcidata);
val = val & 0xffff;
/* clear by setting */
@@ -283,15 +257,13 @@ void tx_iooutw(unsigned long data, unsigned short *addr)
data = data | (data << 16);
ioaddr = (unsigned long) addr;
- offset = ioaddr & 0x3;
- if (offset == 0)
- byte = 0x3;
- else if (offset == 2)
- byte = 0xc;
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcidata = data;
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipciaddr =
+ offset = ioaddr & 0x2;
+ byte = 3 << offset;
+
+ *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcidata = data;
+ *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
(unsigned long) ioaddr;
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcibe =
+ *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
(PCI_IPCIBE_ICMD_IOWRITE << PCI_IPCIBE_ICMD_SHIFT) | byte;
while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
/* clear by setting */
@@ -304,14 +276,14 @@ unsigned long tx_ioinl(unsigned int *addr)
__u32 ioaddr;
ioaddr = (unsigned long) addr;
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipciaddr =
+ *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
(unsigned long) ioaddr;
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcibe =
+ *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
(PCI_IPCIBE_ICMD_IOREAD << PCI_IPCIBE_ICMD_SHIFT) |
PCI_IPCIBE_IBE_LONG;
while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
val =
- le32_to_cpu(*(volatile u32 *) (ulong) & tx3927_pcicptr->
+ le32_to_cpu(*(volatile u32 *) (unsigned long) & tx3927_pcicptr->
ipcidata);
/* clear by setting */
tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
@@ -323,11 +295,11 @@ void tx_iooutl(unsigned long data, unsigned int *addr)
__u32 ioaddr;
ioaddr = (unsigned long) addr;
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcidata =
+ *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcidata =
cpu_to_le32(data);
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipciaddr =
+ *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
(unsigned long) ioaddr;
- *(volatile u32 *) (ulong) & tx3927_pcicptr->ipcibe =
+ *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
(PCI_IPCIBE_ICMD_IOWRITE << PCI_IPCIBE_ICMD_SHIFT) |
PCI_IPCIBE_IBE_LONG;
while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
diff --git a/arch/mips/pci/ops-vr41xx.c b/arch/mips/pci/ops-vr41xx.c
index 430429b22ae..900c6b32576 100644
--- a/arch/mips/pci/ops-vr41xx.c
+++ b/arch/mips/pci/ops-vr41xx.c
@@ -3,7 +3,7 @@
*
* Copyright (C) 2001-2003 MontaVista Software Inc.
* Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
- * Copyright (C) 2004-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * Copyright (C) 2004-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/arch/mips/pci/pci-jmr3927.c b/arch/mips/pci/pci-jmr3927.c
index 95a028769e5..f02ef6e36b0 100644
--- a/arch/mips/pci/pci-jmr3927.c
+++ b/arch/mips/pci/pci-jmr3927.c
@@ -54,5 +54,5 @@ struct pci_controller jmr3927_controller = {
.pci_ops = &jmr3927_pci_ops,
.io_resource = &pci_io_resource,
.mem_resource = &pci_mem_resource,
- .mem_offset = JMR3927_PCIMEM;
+ .mem_offset = JMR3927_PCIMEM
};
diff --git a/arch/mips/pci/pci-vr41xx.c b/arch/mips/pci/pci-vr41xx.c
index 91df4da7ddb..9885fa40360 100644
--- a/arch/mips/pci/pci-vr41xx.c
+++ b/arch/mips/pci/pci-vr41xx.c
@@ -3,7 +3,7 @@
*
* Copyright (C) 2001-2003 MontaVista Software Inc.
* Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
- * Copyright (C) 2004-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * Copyright (C) 2004-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
* Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
*
* This program is free software; you can redistribute it and/or modify
diff --git a/arch/mips/pci/pci-vr41xx.h b/arch/mips/pci/pci-vr41xx.h
index e087ec55641..8a35e32b837 100644
--- a/arch/mips/pci/pci-vr41xx.h
+++ b/arch/mips/pci/pci-vr41xx.h
@@ -3,7 +3,7 @@
*
* Copyright (C) 2002 MontaVista Software Inc.
* Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com>
- * Copyright (C) 2004-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ * Copyright (C) 2004-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-15 16:41:44 +0000