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-rw-r--r--arch/mips/rb532/devices.c22
-rw-r--r--arch/mips/rb532/gpio.c238
-rw-r--r--arch/mips/rb532/irq.c2
-rw-r--r--arch/mips/rb532/prom.c12
-rw-r--r--arch/mips/rb532/serial.c6
-rw-r--r--arch/mips/rb532/setup.c4
6 files changed, 177 insertions, 107 deletions
diff --git a/arch/mips/rb532/devices.c b/arch/mips/rb532/devices.c
index 82ab395efa3..31619c601b1 100644
--- a/arch/mips/rb532/devices.c
+++ b/arch/mips/rb532/devices.c
@@ -34,21 +34,11 @@
#include <asm/mach-rc32434/rb.h>
#include <asm/mach-rc32434/integ.h>
#include <asm/mach-rc32434/gpio.h>
-
-#define ETH0_DMA_RX_IRQ (GROUP1_IRQ_BASE + 0)
-#define ETH0_DMA_TX_IRQ (GROUP1_IRQ_BASE + 1)
-#define ETH0_RX_OVR_IRQ (GROUP3_IRQ_BASE + 9)
-#define ETH0_TX_UND_IRQ (GROUP3_IRQ_BASE + 10)
+#include <asm/mach-rc32434/irq.h>
#define ETH0_RX_DMA_ADDR (DMA0_BASE_ADDR + 0 * DMA_CHAN_OFFSET)
#define ETH0_TX_DMA_ADDR (DMA0_BASE_ADDR + 1 * DMA_CHAN_OFFSET)
-/* NAND definitions */
-#define GPIO_RDY (1 << 0x08)
-#define GPIO_WPX (1 << 0x09)
-#define GPIO_ALE (1 << 0x0a)
-#define GPIO_CLE (1 << 0x0b)
-
static struct resource korina_dev0_res[] = {
{
.name = "korina_regs",
@@ -94,15 +84,13 @@ static struct korina_device korina_dev0_data = {
};
static struct platform_device korina_dev0 = {
- .id = 0,
+ .id = -1,
.name = "korina",
.dev.platform_data = &korina_dev0_data,
.resource = korina_dev0_res,
.num_resources = ARRAY_SIZE(korina_dev0_res),
};
-#define CF_GPIO_NUM 13
-
static struct resource cf_slot0_res[] = {
{
.name = "cf_membase",
@@ -116,11 +104,11 @@ static struct resource cf_slot0_res[] = {
};
static struct cf_device cf_slot0_data = {
- .gpio_pin = 13
+ .gpio_pin = CF_GPIO_NUM
};
static struct platform_device cf_slot0 = {
- .id = 0,
+ .id = -1,
.name = "pata-rb532-cf",
.dev.platform_data = &cf_slot0_data,
.resource = cf_slot0_res,
@@ -185,7 +173,7 @@ static struct mtd_partition rb532_partition_info[] = {
static struct platform_device rb532_led = {
.name = "rb532-led",
- .id = 0,
+ .id = -1,
};
static struct gpio_keys_button rb532_gpio_btn[] = {
diff --git a/arch/mips/rb532/gpio.c b/arch/mips/rb532/gpio.c
index 00a1c7877bf..76a7fd96d56 100644
--- a/arch/mips/rb532/gpio.c
+++ b/arch/mips/rb532/gpio.c
@@ -27,28 +27,31 @@
*/
#include <linux/kernel.h>
-#include <linux/gpio.h>
#include <linux/init.h>
#include <linux/types.h>
-#include <linux/pci.h>
#include <linux/spinlock.h>
-#include <linux/io.h>
#include <linux/platform_device.h>
-
-#include <asm/addrspace.h>
+#include <linux/gpio.h>
#include <asm/mach-rc32434/rb.h>
-
-struct rb532_gpio_reg __iomem *rb532_gpio_reg0;
-EXPORT_SYMBOL(rb532_gpio_reg0);
+#include <asm/mach-rc32434/gpio.h>
+
+struct rb532_gpio_chip {
+ struct gpio_chip chip;
+ void __iomem *regbase;
+ void (*set_int_level)(struct gpio_chip *chip, unsigned offset, int value);
+ int (*get_int_level)(struct gpio_chip *chip, unsigned offset);
+ void (*set_int_status)(struct gpio_chip *chip, unsigned offset, int value);
+ int (*get_int_status)(struct gpio_chip *chip, unsigned offset);
+};
struct mpmc_device dev3;
static struct resource rb532_gpio_reg0_res[] = {
{
.name = "gpio_reg0",
- .start = (u32)(IDT434_REG_BASE + GPIOBASE),
- .end = (u32)(IDT434_REG_BASE + GPIOBASE + sizeof(struct rb532_gpio_reg)),
+ .start = REGBASE + GPIOBASE,
+ .end = REGBASE + GPIOBASE + sizeof(struct rb532_gpio_reg) - 1,
.flags = IORESOURCE_MEM,
}
};
@@ -56,8 +59,8 @@ static struct resource rb532_gpio_reg0_res[] = {
static struct resource rb532_dev3_ctl_res[] = {
{
.name = "dev3_ctl",
- .start = (u32)(IDT434_REG_BASE + DEV3BASE),
- .end = (u32)(IDT434_REG_BASE + DEV3BASE + sizeof(struct dev_reg)),
+ .start = REGBASE + DEV3BASE,
+ .end = REGBASE + DEV3BASE + sizeof(struct dev_reg) - 1,
.flags = IORESOURCE_MEM,
}
};
@@ -70,7 +73,7 @@ void set_434_reg(unsigned reg_offs, unsigned bit, unsigned len, unsigned val)
spin_lock_irqsave(&dev3.lock, flags);
- data = *(volatile unsigned *) (IDT434_REG_BASE + reg_offs);
+ data = readl(IDT434_REG_BASE + reg_offs);
for (i = 0; i != len; ++i) {
if (val & (1 << i))
data |= (1 << (i + bit));
@@ -108,108 +111,199 @@ unsigned char get_latch_u5(void)
}
EXPORT_SYMBOL(get_latch_u5);
-int rb532_gpio_get_value(unsigned gpio)
+/*
+ * Return GPIO level */
+static int rb532_gpio_get(struct gpio_chip *chip, unsigned offset)
{
- return readl(&rb532_gpio_reg0->gpiod) & (1 << gpio);
+ u32 mask = 1 << offset;
+ struct rb532_gpio_chip *gpch;
+
+ gpch = container_of(chip, struct rb532_gpio_chip, chip);
+ return readl(gpch->regbase + GPIOD) & mask;
}
-EXPORT_SYMBOL(rb532_gpio_get_value);
-void rb532_gpio_set_value(unsigned gpio, int value)
+/*
+ * Set output GPIO level
+ */
+static void rb532_gpio_set(struct gpio_chip *chip,
+ unsigned offset, int value)
{
- unsigned tmp;
+ unsigned long flags;
+ u32 mask = 1 << offset;
+ u32 tmp;
+ struct rb532_gpio_chip *gpch;
+ void __iomem *gpvr;
- tmp = readl(&rb532_gpio_reg0->gpiod) & ~(1 << gpio);
- if (value)
- tmp |= 1 << gpio;
+ gpch = container_of(chip, struct rb532_gpio_chip, chip);
+ gpvr = gpch->regbase + GPIOD;
- writel(tmp, (void *)&rb532_gpio_reg0->gpiod);
+ local_irq_save(flags);
+ tmp = readl(gpvr);
+ if (value)
+ tmp |= mask;
+ else
+ tmp &= ~mask;
+ writel(tmp, gpvr);
+ local_irq_restore(flags);
}
-EXPORT_SYMBOL(rb532_gpio_set_value);
-int rb532_gpio_direction_input(unsigned gpio)
+/*
+ * Set GPIO direction to input
+ */
+static int rb532_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
{
- writel(readl(&rb532_gpio_reg0->gpiocfg) & ~(1 << gpio),
- (void *)&rb532_gpio_reg0->gpiocfg);
+ unsigned long flags;
+ u32 mask = 1 << offset;
+ u32 value;
+ struct rb532_gpio_chip *gpch;
+ void __iomem *gpdr;
- return 0;
-}
-EXPORT_SYMBOL(rb532_gpio_direction_input);
+ gpch = container_of(chip, struct rb532_gpio_chip, chip);
+ gpdr = gpch->regbase + GPIOCFG;
-int rb532_gpio_direction_output(unsigned gpio, int value)
-{
- gpio_set_value(gpio, value);
- writel(readl(&rb532_gpio_reg0->gpiocfg) | (1 << gpio),
- (void *)&rb532_gpio_reg0->gpiocfg);
+ local_irq_save(flags);
+ value = readl(gpdr);
+ value &= ~mask;
+ writel(value, gpdr);
+ local_irq_restore(flags);
return 0;
}
-EXPORT_SYMBOL(rb532_gpio_direction_output);
-void rb532_gpio_set_int_level(unsigned gpio, int value)
+/*
+ * Set GPIO direction to output
+ */
+static int rb532_gpio_direction_output(struct gpio_chip *chip,
+ unsigned offset, int value)
{
- unsigned tmp;
+ unsigned long flags;
+ u32 mask = 1 << offset;
+ u32 tmp;
+ struct rb532_gpio_chip *gpch;
+ void __iomem *gpdr;
+
+ gpch = container_of(chip, struct rb532_gpio_chip, chip);
+ writel(mask, gpch->regbase + GPIOD);
+ gpdr = gpch->regbase + GPIOCFG;
+
+ local_irq_save(flags);
+ tmp = readl(gpdr);
+ tmp |= mask;
+ writel(tmp, gpdr);
+ local_irq_restore(flags);
- tmp = readl(&rb532_gpio_reg0->gpioilevel) & ~(1 << gpio);
- if (value)
- tmp |= 1 << gpio;
- writel(tmp, (void *)&rb532_gpio_reg0->gpioilevel);
+ return 0;
}
-EXPORT_SYMBOL(rb532_gpio_set_int_level);
-int rb532_gpio_get_int_level(unsigned gpio)
+/*
+ * Set the GPIO interrupt level
+ */
+static void rb532_gpio_set_int_level(struct gpio_chip *chip,
+ unsigned offset, int value)
{
- return readl(&rb532_gpio_reg0->gpioilevel) & (1 << gpio);
-}
-EXPORT_SYMBOL(rb532_gpio_get_int_level);
+ unsigned long flags;
+ u32 mask = 1 << offset;
+ u32 tmp;
+ struct rb532_gpio_chip *gpch;
+ void __iomem *gpil;
-void rb532_gpio_set_int_status(unsigned gpio, int value)
-{
- unsigned tmp;
+ gpch = container_of(chip, struct rb532_gpio_chip, chip);
+ gpil = gpch->regbase + GPIOILEVEL;
- tmp = readl(&rb532_gpio_reg0->gpioistat);
+ local_irq_save(flags);
+ tmp = readl(gpil);
if (value)
- tmp |= 1 << gpio;
- writel(tmp, (void *)&rb532_gpio_reg0->gpioistat);
+ tmp |= mask;
+ else
+ tmp &= ~mask;
+ writel(tmp, gpil);
+ local_irq_restore(flags);
}
-EXPORT_SYMBOL(rb532_gpio_set_int_status);
-int rb532_gpio_get_int_status(unsigned gpio)
+/*
+ * Get the GPIO interrupt level
+ */
+static int rb532_gpio_get_int_level(struct gpio_chip *chip, unsigned offset)
{
- return readl(&rb532_gpio_reg0->gpioistat) & (1 << gpio);
+ u32 mask = 1 << offset;
+ struct rb532_gpio_chip *gpch;
+
+ gpch = container_of(chip, struct rb532_gpio_chip, chip);
+ return readl(gpch->regbase + GPIOILEVEL) & mask;
}
-EXPORT_SYMBOL(rb532_gpio_get_int_status);
-void rb532_gpio_set_func(unsigned gpio, int value)
+/*
+ * Set the GPIO interrupt status
+ */
+static void rb532_gpio_set_int_status(struct gpio_chip *chip,
+ unsigned offset, int value)
{
- unsigned tmp;
+ unsigned long flags;
+ u32 mask = 1 << offset;
+ u32 tmp;
+ struct rb532_gpio_chip *gpch;
+ void __iomem *gpis;
+
+ gpch = container_of(chip, struct rb532_gpio_chip, chip);
+ gpis = gpch->regbase + GPIOISTAT;
- tmp = readl(&rb532_gpio_reg0->gpiofunc);
+ local_irq_save(flags);
+ tmp = readl(gpis);
if (value)
- tmp |= 1 << gpio;
- writel(tmp, (void *)&rb532_gpio_reg0->gpiofunc);
+ tmp |= mask;
+ else
+ tmp &= ~mask;
+ writel(tmp, gpis);
+ local_irq_restore(flags);
}
-EXPORT_SYMBOL(rb532_gpio_set_func);
-int rb532_gpio_get_func(unsigned gpio)
+/*
+ * Get the GPIO interrupt status
+ */
+static int rb532_gpio_get_int_status(struct gpio_chip *chip, unsigned offset)
{
- return readl(&rb532_gpio_reg0->gpiofunc) & (1 << gpio);
+ u32 mask = 1 << offset;
+ struct rb532_gpio_chip *gpch;
+
+ gpch = container_of(chip, struct rb532_gpio_chip, chip);
+ return readl(gpch->regbase + GPIOISTAT) & mask;
}
-EXPORT_SYMBOL(rb532_gpio_get_func);
+
+static struct rb532_gpio_chip rb532_gpio_chip[] = {
+ [0] = {
+ .chip = {
+ .label = "gpio0",
+ .direction_input = rb532_gpio_direction_input,
+ .direction_output = rb532_gpio_direction_output,
+ .get = rb532_gpio_get,
+ .set = rb532_gpio_set,
+ .base = 0,
+ .ngpio = 32,
+ },
+ .get_int_level = rb532_gpio_get_int_level,
+ .set_int_level = rb532_gpio_set_int_level,
+ .get_int_status = rb532_gpio_get_int_status,
+ .set_int_status = rb532_gpio_set_int_status,
+ },
+};
int __init rb532_gpio_init(void)
{
- rb532_gpio_reg0 = ioremap_nocache(rb532_gpio_reg0_res[0].start,
- rb532_gpio_reg0_res[0].end -
- rb532_gpio_reg0_res[0].start);
+ struct resource *r;
- if (!rb532_gpio_reg0) {
+ r = rb532_gpio_reg0_res;
+ rb532_gpio_chip->regbase = ioremap_nocache(r->start, r->end - r->start);
+
+ if (!rb532_gpio_chip->regbase) {
printk(KERN_ERR "rb532: cannot remap GPIO register 0\n");
return -ENXIO;
}
- dev3.base = ioremap_nocache(rb532_dev3_ctl_res[0].start,
- rb532_dev3_ctl_res[0].end -
- rb532_dev3_ctl_res[0].start);
+ /* Register our GPIO chip */
+ gpiochip_add(&rb532_gpio_chip->chip);
+
+ r = rb532_dev3_ctl_res;
+ dev3.base = ioremap_nocache(r->start, r->end - r->start);
if (!dev3.base) {
printk(KERN_ERR "rb532: cannot remap device controller 3\n");
diff --git a/arch/mips/rb532/irq.c b/arch/mips/rb532/irq.c
index c0d0f950caf..549b46d2fce 100644
--- a/arch/mips/rb532/irq.c
+++ b/arch/mips/rb532/irq.c
@@ -45,7 +45,7 @@
#include <asm/mipsregs.h>
#include <asm/system.h>
-#include <asm/mach-rc32434/rc32434.h>
+#include <asm/mach-rc32434/irq.h>
struct intr_group {
u32 mask; /* mask of valid bits in pending/mask registers */
diff --git a/arch/mips/rb532/prom.c b/arch/mips/rb532/prom.c
index 1bc0af8febf..46ca24dbcc2 100644
--- a/arch/mips/rb532/prom.c
+++ b/arch/mips/rb532/prom.c
@@ -37,12 +37,8 @@
#include <asm/mach-rc32434/ddr.h>
#include <asm/mach-rc32434/prom.h>
-extern void __init setup_serial_port(void);
-
unsigned int idt_cpu_freq = 132000000;
EXPORT_SYMBOL(idt_cpu_freq);
-unsigned int gpio_bootup_state;
-EXPORT_SYMBOL(gpio_bootup_state);
static struct resource ddr_reg[] = {
{
@@ -108,9 +104,6 @@ void __init prom_setup_cmdline(void)
mips_machtype = MACH_MIKROTIK_RB532;
}
- if (match_tag(prom_argv[i], GPIO_TAG))
- gpio_bootup_state = tag2ul(prom_argv[i], GPIO_TAG);
-
strcpy(cp, prom_argv[i]);
cp += strlen(prom_argv[i]);
}
@@ -122,11 +115,6 @@ void __init prom_setup_cmdline(void)
strcpy(cp, arcs_cmdline);
cp += strlen(arcs_cmdline);
}
- if (gpio_bootup_state & 0x02)
- strcpy(cp, GPIO_INIT_NOBUTTON);
- else
- strcpy(cp, GPIO_INIT_BUTTON);
-
cmd_line[CL_SIZE-1] = '\0';
strcpy(arcs_cmdline, cmd_line);
diff --git a/arch/mips/rb532/serial.c b/arch/mips/rb532/serial.c
index 1a05b5ddee0..3e0d7ec3a57 100644
--- a/arch/mips/rb532/serial.c
+++ b/arch/mips/rb532/serial.c
@@ -31,16 +31,16 @@
#include <linux/serial_8250.h>
#include <asm/serial.h>
-#include <asm/mach-rc32434/rc32434.h>
+#include <asm/mach-rc32434/rb.h>
extern unsigned int idt_cpu_freq;
static struct uart_port rb532_uart = {
.type = PORT_16550A,
.line = 0,
- .irq = RC32434_UART0_IRQ,
+ .irq = UART0_IRQ,
.iotype = UPIO_MEM,
- .membase = (char *)KSEG1ADDR(RC32434_UART0_BASE),
+ .membase = (char *)KSEG1ADDR(REGBASE + UART0BASE),
.regshift = 2
};
diff --git a/arch/mips/rb532/setup.c b/arch/mips/rb532/setup.c
index 7aafa95ac20..50f530f5b60 100644
--- a/arch/mips/rb532/setup.c
+++ b/arch/mips/rb532/setup.c
@@ -9,7 +9,7 @@
#include <asm/time.h>
#include <linux/ioport.h>
-#include <asm/mach-rc32434/rc32434.h>
+#include <asm/mach-rc32434/rb.h>
#include <asm/mach-rc32434/pci.h>
struct pci_reg __iomem *pci_reg;
@@ -27,7 +27,7 @@ static struct resource pci0_res[] = {
static void rb_machine_restart(char *command)
{
/* just jump to the reset vector */
- writel(0x80000001, (void *)KSEG1ADDR(RC32434_REG_BASE + RC32434_RST));
+ writel(0x80000001, IDT434_REG_BASE + RST);
((void (*)(void)) KSEG1ADDR(0x1FC00000u))();
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-01 11:21:55 +0000