diff options
Diffstat (limited to 'drivers/serial')
34 files changed, 525 insertions, 492 deletions
diff --git a/drivers/serial/21285.c b/drivers/serial/21285.c index 221999bcf8f..8c5c276c557 100644 --- a/drivers/serial/21285.c +++ b/drivers/serial/21285.c @@ -362,11 +362,11 @@ static struct uart_ops serial21285_ops = { static struct uart_port serial21285_port = { .mapbase = 0x42000160, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .irq = NO_IRQ, .fifosize = 16, .ops = &serial21285_ops, - .flags = ASYNC_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF, }; static void serial21285_setup_ports(void) diff --git a/drivers/serial/68328serial.c b/drivers/serial/68328serial.c index 8cbf0fc5a22..7f0f35a05dc 100644 --- a/drivers/serial/68328serial.c +++ b/drivers/serial/68328serial.c @@ -332,7 +332,7 @@ static _INLINE_ void receive_chars(struct m68k_serial *info, struct pt_regs *reg * Make sure that we do not overflow the buffer */ if (tty_request_buffer_room(tty, 1) == 0) { - schedule_work(&tty->flip.work); + tty_schedule_flip(tty); return; } @@ -353,7 +353,7 @@ static _INLINE_ void receive_chars(struct m68k_serial *info, struct pt_regs *reg } while((rx = uart->urx.w) & URX_DATA_READY); #endif - schedule_work(&tty->flip.work); + tty_schedule_flip(tty); clear_and_exit: return; diff --git a/drivers/serial/68360serial.c b/drivers/serial/68360serial.c index 60f5a5dc17f..9843ae3d420 100644 --- a/drivers/serial/68360serial.c +++ b/drivers/serial/68360serial.c @@ -509,7 +509,7 @@ static _INLINE_ void receive_chars(ser_info_t *info) info->rx_cur = (QUICC_BD *)bdp; - schedule_work(&tty->flip.work); + tty_schedule_flip(tty); } static _INLINE_ void receive_break(ser_info_t *info) @@ -521,7 +521,7 @@ static _INLINE_ void receive_break(ser_info_t *info) * the break. If not, we exit now, losing the break. FIXME */ tty_insert_flip_char(tty, 0, TTY_BREAK); - schedule_work(&tty->flip.work); + tty_schedule_flip(tty); } static _INLINE_ void transmit_chars(ser_info_t *info) diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c index bc36edff205..b1fc97d5f64 100644 --- a/drivers/serial/8250.c +++ b/drivers/serial/8250.c @@ -31,7 +31,6 @@ #include <linux/init.h> #include <linux/console.h> #include <linux/sysrq.h> -#include <linux/mca.h> #include <linux/delay.h> #include <linux/platform_device.h> #include <linux/tty.h> @@ -2027,12 +2026,6 @@ static void serial8250_config_port(struct uart_port *port, int flags) int ret; /* - * Don't probe for MCA ports on non-MCA machines. - */ - if (up->port.flags & UPF_BOOT_ONLYMCA && !MCA_bus) - return; - - /* * Find the region that we can probe for. This in turn * tells us whether we can probe for the type of port. */ @@ -2164,7 +2157,7 @@ serial8250_register_ports(struct uart_driver *drv, struct device *dev) /* * Wait for transmitter & holding register to empty */ -static inline void wait_for_xmitr(struct uart_8250_port *up) +static inline void wait_for_xmitr(struct uart_8250_port *up, int bits) { unsigned int status, tmout = 10000; @@ -2178,7 +2171,7 @@ static inline void wait_for_xmitr(struct uart_8250_port *up) if (--tmout == 0) break; udelay(1); - } while ((status & BOTH_EMPTY) != BOTH_EMPTY); + } while ((status & bits) != bits); /* Wait up to 1s for flow control if necessary */ if (up->port.flags & UPF_CONS_FLOW) { @@ -2218,7 +2211,7 @@ serial8250_console_write(struct console *co, const char *s, unsigned int count) * Now, do each character */ for (i = 0; i < count; i++, s++) { - wait_for_xmitr(up); + wait_for_xmitr(up, UART_LSR_THRE); /* * Send the character out. @@ -2226,7 +2219,7 @@ serial8250_console_write(struct console *co, const char *s, unsigned int count) */ serial_out(up, UART_TX, *s); if (*s == 10) { - wait_for_xmitr(up); + wait_for_xmitr(up, UART_LSR_THRE); serial_out(up, UART_TX, 13); } } @@ -2235,8 +2228,9 @@ serial8250_console_write(struct console *co, const char *s, unsigned int count) * Finally, wait for transmitter to become empty * and restore the IER */ - wait_for_xmitr(up); - serial_out(up, UART_IER, ier); + wait_for_xmitr(up, BOTH_EMPTY); + up->ier |= UART_IER_THRI; + serial_out(up, UART_IER, ier | UART_IER_THRI); } static int serial8250_console_setup(struct console *co, char *options) diff --git a/drivers/serial/8250_acpi.c b/drivers/serial/8250_acpi.c index a802bdce6e5..809f89ab965 100644 --- a/drivers/serial/8250_acpi.c +++ b/drivers/serial/8250_acpi.c @@ -27,7 +27,7 @@ struct serial_private { static acpi_status acpi_serial_mmio(struct uart_port *port, struct acpi_resource_address64 *addr) { - port->mapbase = addr->min_address_range; + port->mapbase = addr->minimum; port->iotype = UPIO_MEM; port->flags |= UPF_IOREMAP; return AE_OK; @@ -36,8 +36,8 @@ static acpi_status acpi_serial_mmio(struct uart_port *port, static acpi_status acpi_serial_port(struct uart_port *port, struct acpi_resource_io *io) { - if (io->range_length) { - port->iobase = io->min_base_address; + if (io->address_length) { + port->iobase = io->minimum; port->iotype = UPIO_PORT; } else printk(KERN_ERR "%s: zero-length IO port range?\n", __FUNCTION__); @@ -45,13 +45,13 @@ static acpi_status acpi_serial_port(struct uart_port *port, } static acpi_status acpi_serial_ext_irq(struct uart_port *port, - struct acpi_resource_ext_irq *ext_irq) + struct acpi_resource_extended_irq *ext_irq) { int rc; - if (ext_irq->number_of_interrupts > 0) { + if (ext_irq->interrupt_count > 0) { rc = acpi_register_gsi(ext_irq->interrupts[0], - ext_irq->edge_level, ext_irq->active_high_low); + ext_irq->triggering, ext_irq->polarity); if (rc < 0) return AE_ERROR; port->irq = rc; @@ -64,9 +64,9 @@ static acpi_status acpi_serial_irq(struct uart_port *port, { int rc; - if (irq->number_of_interrupts > 0) { + if (irq->interrupt_count > 0) { rc = acpi_register_gsi(irq->interrupts[0], - irq->edge_level, irq->active_high_low); + irq->triggering, irq->polarity); if (rc < 0) return AE_ERROR; port->irq = rc; @@ -83,11 +83,11 @@ static acpi_status acpi_serial_resource(struct acpi_resource *res, void *data) status = acpi_resource_to_address64(res, &addr); if (ACPI_SUCCESS(status)) return acpi_serial_mmio(port, &addr); - else if (res->id == ACPI_RSTYPE_IO) + else if (res->type == ACPI_RESOURCE_TYPE_IO) return acpi_serial_port(port, &res->data.io); - else if (res->id == ACPI_RSTYPE_EXT_IRQ) + else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) return acpi_serial_ext_irq(port, &res->data.extended_irq); - else if (res->id == ACPI_RSTYPE_IRQ) + else if (res->type == ACPI_RESOURCE_TYPE_IRQ) return acpi_serial_irq(port, &res->data.irq); return AE_OK; } diff --git a/drivers/serial/8250_au1x00.c b/drivers/serial/8250_au1x00.c index 06ae8fbcc94..8d8d7a70d03 100644 --- a/drivers/serial/8250_au1x00.c +++ b/drivers/serial/8250_au1x00.c @@ -56,7 +56,6 @@ static struct plat_serial8250_port au1x00_data[] = { #elif defined(CONFIG_SOC_AU1550) PORT(UART0_ADDR, AU1550_UART0_INT), PORT(UART1_ADDR, AU1550_UART1_INT), - PORT(UART2_ADDR, AU1550_UART2_INT), PORT(UART3_ADDR, AU1550_UART3_INT), #elif defined(CONFIG_SOC_AU1200) PORT(UART0_ADDR, AU1200_UART0_INT), diff --git a/drivers/serial/8250_pci.c b/drivers/serial/8250_pci.c index 2a912153321..94886c000d2 100644 --- a/drivers/serial/8250_pci.c +++ b/drivers/serial/8250_pci.c @@ -439,6 +439,20 @@ static int pci_siig_init(struct pci_dev *dev) return -ENODEV; } +static int pci_siig_setup(struct serial_private *priv, + struct pciserial_board *board, + struct uart_port *port, int idx) +{ + unsigned int bar = FL_GET_BASE(board->flags) + idx, offset = 0; + + if (idx > 3) { + bar = 4; + offset = (idx - 4) * 8; + } + + return setup_port(priv, port, bar, offset, 0); +} + /* * Timedia has an explosion of boards, and to avoid the PCI table from * growing *huge*, we use this function to collapse some 70 entries @@ -748,7 +762,7 @@ static struct pci_serial_quirk pci_serial_quirks[] = { .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, .init = pci_siig_init, - .setup = pci_default_setup, + .setup = pci_siig_setup, }, /* * Titan cards @@ -1868,6 +1882,10 @@ static struct pci_device_id serial_pci_tbl[] = { PCI_SUBVENDOR_ID_CONNECT_TECH, PCI_SUBDEVICE_ID_CONNECT_TECH_TITAN_4, 0, 0, pbn_b0_4_1843200 }, + { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI954, + PCI_VENDOR_ID_AFAVLAB, + PCI_SUBDEVICE_ID_AFAVLAB_P061, 0, 0, + pbn_b0_4_1152000 }, { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C152, PCI_SUBVENDOR_ID_CONNECT_TECH, PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2_232, 0, 0, @@ -2141,6 +2159,15 @@ static struct pci_device_id serial_pci_tbl[] = { { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_4S_20x_850, PCI_ANY_ID, PCI_ANY_ID, 0, 0, pbn_b0_bt_4_921600 }, + { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_8S_20x_550, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, + pbn_b0_bt_8_921600 }, + { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_8S_20x_650, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, + pbn_b0_bt_8_921600 }, + { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_8S_20x_850, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, + pbn_b0_bt_8_921600 }, /* * Computone devices submitted by Doug McNash dmcnash@computone.com diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 9fd1925de36..0f4361c8466 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -23,7 +23,7 @@ config SERIAL_8250 work.) To compile this driver as a module, choose M here: the - module will be called serial. + module will be called 8250. [WARNING: Do not compile this driver as a module if you are using non-standard serial ports, since the configuration information will be lost when the driver is unloaded. This limitation may be lifted @@ -98,6 +98,7 @@ config SERIAL_8250_NR_UARTS config SERIAL_8250_RUNTIME_UARTS int "Number of 8250/16550 serial ports to register at runtime" depends on SERIAL_8250 + range 0 SERIAL_8250_NR_UARTS default "4" help Set this to the maximum number of serial ports you want @@ -892,20 +893,20 @@ config SERIAL_VR41XX_CONSOLE a console on a serial port, say Y. Otherwise, say N. config SERIAL_JSM - tristate "Digi International NEO PCI Support" - depends on PCI && BROKEN - select SERIAL_CORE - help - This is a driver for Digi International's Neo series - of cards which provide multiple serial ports. You would need - something like this to connect more than two modems to your Linux - box, for instance in order to become a dial-in server. This driver - supports PCI boards only. - If you have a card like this, say Y here and read the file - <file:Documentation/jsm.txt>. - - To compile this driver as a module, choose M here: the - module will be called jsm. + tristate "Digi International NEO PCI Support" + depends on PCI + select SERIAL_CORE + help + This is a driver for Digi International's Neo series + of cards which provide multiple serial ports. You would need + something like this to connect more than two modems to your Linux + box, for instance in order to become a dial-in server. This driver + supports PCI boards only. + If you have a card like this, say Y here and read the file + <file:Documentation/jsm.txt>. + + To compile this driver as a module, choose M here: the + module will be called jsm. config SERIAL_SGI_IOC4 tristate "SGI IOC4 controller serial support" diff --git a/drivers/serial/amba-pl010.c b/drivers/serial/amba-pl010.c index 3490022e9fd..321a3b3a572 100644 --- a/drivers/serial/amba-pl010.c +++ b/drivers/serial/amba-pl010.c @@ -561,12 +561,12 @@ static struct uart_amba_port amba_ports[UART_NR] = { .port = { .membase = (void *)IO_ADDRESS(INTEGRATOR_UART0_BASE), .mapbase = INTEGRATOR_UART0_BASE, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .irq = IRQ_UARTINT0, .uartclk = 14745600, .fifosize = 16, .ops = &amba_pl010_pops, - .flags = ASYNC_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF, .line = 0, }, .dtr_mask = 1 << 5, @@ -576,12 +576,12 @@ static struct uart_amba_port amba_ports[UART_NR] = { .port = { .membase = (void *)IO_ADDRESS(INTEGRATOR_UART1_BASE), .mapbase = INTEGRATOR_UART1_BASE, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .irq = IRQ_UARTINT1, .uartclk = 14745600, .fifosize = 16, .ops = &amba_pl010_pops, - .flags = ASYNC_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF, .line = 1, }, .dtr_mask = 1 << 7, diff --git a/drivers/serial/au1x00_uart.c b/drivers/serial/au1x00_uart.c index ceb5d7f37bb..344022fe53e 100644 --- a/drivers/serial/au1x00_uart.c +++ b/drivers/serial/au1x00_uart.c @@ -892,7 +892,7 @@ serial8250_request_std_resource(struct uart_8250_port *up, struct resource **res int ret = 0; switch (up->port.iotype) { - case SERIAL_IO_MEM: + case UPIO_MEM: if (up->port.mapbase) { *res = request_mem_region(up->port.mapbase, size, "serial"); if (!*res) @@ -900,8 +900,8 @@ serial8250_request_std_resource(struct uart_8250_port *up, struct resource **res } break; - case SERIAL_IO_HUB6: - case SERIAL_IO_PORT: + case UPIO_HUB6: + case UPIO_PORT: *res = request_region(up->port.iobase, size, "serial"); if (!*res) ret = -EBUSY; @@ -919,7 +919,7 @@ static void serial8250_release_port(struct uart_port *port) size <<= up->port.regshift; switch (up->port.iotype) { - case SERIAL_IO_MEM: + case UPIO_MEM: if (up->port.mapbase) { /* * Unmap the area. @@ -935,8 +935,8 @@ static void serial8250_release_port(struct uart_port *port) } break; - case SERIAL_IO_HUB6: - case SERIAL_IO_PORT: + case UPIO_HUB6: + case UPIO_PORT: start = up->port.iobase; if (size) diff --git a/drivers/serial/clps711x.c b/drivers/serial/clps711x.c index 8ef999481f9..ce7b2e4ecd1 100644 --- a/drivers/serial/clps711x.c +++ b/drivers/serial/clps711x.c @@ -410,7 +410,7 @@ static struct uart_port clps711x_ports[UART_NR] = { .fifosize = 16, .ops = &clps711x_pops, .line = 0, - .flags = ASYNC_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF, }, { .iobase = SYSCON2, @@ -419,7 +419,7 @@ static struct uart_port clps711x_ports[UART_NR] = { .fifosize = 16, .ops = &clps711x_pops, .line = 1, - .flags = ASYNC_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF, } }; diff --git a/drivers/serial/cpm_uart/cpm_uart_core.c b/drivers/serial/cpm_uart/cpm_uart_core.c index 16af5626c24..b7bf4c698a4 100644 --- a/drivers/serial/cpm_uart/cpm_uart_core.c +++ b/drivers/serial/cpm_uart/cpm_uart_core.c @@ -252,12 +252,9 @@ static void cpm_uart_int_rx(struct uart_port *port, struct pt_regs *regs) /* If we have not enough room in tty flip buffer, then we try * later, which will be the next rx-interrupt or a timeout */ - if ((tty->flip.count + i) >= TTY_FLIPBUF_SIZE) { - tty->flip.work.func((void *)tty); - if ((tty->flip.count + i) >= TTY_FLIPBUF_SIZE) { - printk(KERN_WARNING "TTY_DONT_FLIP set\n"); - return; - } + if(tty_buffer_request_room(tty, i) < i) { + printk(KERN_WARNING "No room in flip buffer\n"); + return; } /* get pointer */ @@ -276,9 +273,7 @@ static void cpm_uart_int_rx(struct uart_port *port, struct pt_regs *regs) continue; error_return: - *tty->flip.char_buf_ptr++ = ch; - *tty->flip.flag_buf_ptr++ = flg; - tty->flip.count++; + tty_insert_flip_char(tty, ch, flg); } /* End while (i--) */ @@ -908,7 +903,7 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = { .port = { .irq = SMC1_IRQ, .ops = &cpm_uart_pops, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .lock = SPIN_LOCK_UNLOCKED, }, .flags = FLAG_SMC, @@ -922,7 +917,7 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = { .port = { .irq = SMC2_IRQ, .ops = &cpm_uart_pops, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .lock = SPIN_LOCK_UNLOCKED, }, .flags = FLAG_SMC, @@ -939,7 +934,7 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = { .port = { .irq = SCC1_IRQ, .ops = &cpm_uart_pops, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .lock = SPIN_LOCK_UNLOCKED, }, .tx_nrfifos = TX_NUM_FIFO, @@ -953,7 +948,7 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = { .port = { .irq = SCC2_IRQ, .ops = &cpm_uart_pops, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .lock = SPIN_LOCK_UNLOCKED, }, .tx_nrfifos = TX_NUM_FIFO, @@ -967,7 +962,7 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = { .port = { .irq = SCC3_IRQ, .ops = &cpm_uart_pops, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .lock = SPIN_LOCK_UNLOCKED, }, .tx_nrfifos = TX_NUM_FIFO, @@ -981,7 +976,7 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = { .port = { .irq = SCC4_IRQ, .ops = &cpm_uart_pops, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .lock = SPIN_LOCK_UNLOCKED, }, .tx_nrfifos = TX_NUM_FIFO, diff --git a/drivers/serial/dz.c b/drivers/serial/dz.c index a64ba26a94e..ba5541de673 100644 --- a/drivers/serial/dz.c +++ b/drivers/serial/dz.c @@ -262,6 +262,7 @@ static inline void dz_receive_chars(struct dz_port *dport) } tty_insert_flip_char(tty, ch, flag); ignore_char: + ; } while (status & DZ_DVAL); if (tty) @@ -650,7 +651,7 @@ static void __init dz_init_ports(void) for (i = 0, dport = dz_ports; i < DZ_NB_PORT; i++, dport++) { spin_lock_init(&dport->port.lock); dport->port.membase = (char *) base; - dport->port.iotype = SERIAL_IO_PORT; + dport->port.iotype = UPIO_PORT; dport->port.irq = dec_interrupt[DEC_IRQ_DZ11]; dport->port.line = i; dport->port.fifosize = 1; diff --git a/drivers/serial/imx.c b/drivers/serial/imx.c index 587cc6a9511..4d53fb5ca87 100644 --- a/drivers/serial/imx.c +++ b/drivers/serial/imx.c @@ -402,10 +402,10 @@ static int imx_startup(struct uart_port *port) DRIVER_NAME, sport); if (retval) goto error_out2; - retval = request_irq(sport->rtsirq, imx_rtsint, 0, + retval = request_irq(sport->rtsirq, imx_rtsint, + SA_TRIGGER_FALLING | SA_TRIGGER_RISING, DRIVER_NAME, sport); if (retval) goto error_out3; - set_irq_type(sport->rtsirq, IRQT_BOTHEDGE); /* * Finally, clear and enable interrupts @@ -668,13 +668,13 @@ static struct imx_port imx_ports[] = { .rtsirq = UART1_MINT_RTS, .port = { .type = PORT_IMX, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .membase = (void *)IMX_UART1_BASE, .mapbase = IMX_UART1_BASE, /* FIXME */ .irq = UART1_MINT_RX, .uartclk = 16000000, .fifosize = 8, - .flags = ASYNC_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF, .ops = &imx_pops, .line = 0, }, @@ -684,13 +684,13 @@ static struct imx_port imx_ports[] = { .rtsirq = UART2_MINT_RTS, .port = { .type = PORT_IMX, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .membase = (void *)IMX_UART2_BASE, .mapbase = IMX_UART2_BASE, /* FIXME */ .irq = UART2_MINT_RX, .uartclk = 16000000, .fifosize = 8, - .flags = ASYNC_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF, .ops = &imx_pops, .line = 1, }, diff --git a/drivers/serial/ip22zilog.c b/drivers/serial/ip22zilog.c index 66f117d1506..419dd3cd786 100644 --- a/drivers/serial/ip22zilog.c +++ b/drivers/serial/ip22zilog.c @@ -215,7 +215,7 @@ static void __load_zsregs(struct zilog_channel *channel, unsigned char *regs) /* Lower and upper byte of baud rate generator divisor. */ write_zsreg(channel, R12, regs[R12]); write_zsreg(channel, R13, regs[R13]); - + /* Now rewrite R14, with BRENAB (if set). */ write_zsreg(channel, R14, regs[R14]); @@ -571,7 +571,7 @@ static void ip22zilog_set_mctrl(struct uart_port *port, unsigned int mctrl) else clear_bits |= DTR; - /* NOTE: Not subject to 'transmitter active' rule. */ + /* NOTE: Not subject to 'transmitter active' rule. */ up->curregs[R5] |= set_bits; up->curregs[R5] &= ~clear_bits; write_zsreg(channel, R5, up->curregs[R5]); @@ -654,7 +654,7 @@ static void ip22zilog_enable_ms(struct uart_port *port) if (new_reg != up->curregs[R15]) { up->curregs[R15] = new_reg; - /* NOTE: Not subject to 'transmitter active' rule. */ + /* NOTE: Not subject to 'transmitter active' rule. */ write_zsreg(channel, R15, up->curregs[R15]); } } @@ -680,7 +680,7 @@ static void ip22zilog_break_ctl(struct uart_port *port, int break_state) if (new_reg != up->curregs[R5]) { up->curregs[R5] = new_reg; - /* NOTE: Not subject to 'transmitter active' rule. */ + /* NOTE: Not subject to 'transmitter active' rule. */ write_zsreg(channel, R5, up->curregs[R5]); } diff --git a/drivers/serial/jsm/jsm.h b/drivers/serial/jsm/jsm.h index 18753193f59..dfc1e86d3aa 100644 --- a/drivers/serial/jsm/jsm.h +++ b/drivers/serial/jsm/jsm.h @@ -380,7 +380,6 @@ struct neo_uart_struct { extern struct uart_driver jsm_uart_driver; extern struct board_ops jsm_neo_ops; extern int jsm_debug; -extern int jsm_rawreadok; /************************************************************************* * diff --git a/drivers/serial/jsm/jsm_driver.c b/drivers/serial/jsm/jsm_driver.c index 7e56c782419..b1b66e71d28 100644 --- a/drivers/serial/jsm/jsm_driver.c +++ b/drivers/serial/jsm/jsm_driver.c @@ -49,11 +49,8 @@ struct uart_driver jsm_uart_driver = { }; int jsm_debug; -int jsm_rawreadok; module_param(jsm_debug, int, 0); -module_param(jsm_rawreadok, int, 0); MODULE_PARM_DESC(jsm_debug, "Driver debugging level"); -MODULE_PARM_DESC(jsm_rawreadok, "Bypass flip buffers on input"); static int jsm_probe_one(struct pci_dev *pdev, const struct pci_device_id *ent) { diff --git a/drivers/serial/jsm/jsm_neo.c b/drivers/serial/jsm/jsm_neo.c index 6f22b42d933..87e4e2cf8ce 100644 --- a/drivers/serial/jsm/jsm_neo.c +++ b/drivers/serial/jsm/jsm_neo.c @@ -965,56 +965,47 @@ static void neo_param(struct jsm_channel *ch) baud = ch->ch_custom_speed; if (ch->ch_flags & CH_BAUD0) ch->ch_flags &= ~(CH_BAUD0); - } else { - int iindex = 0; - int jindex = 0; - - const u64 bauds[4][16] = { - { - 0, 50, 75, 110, - 134, 150, 200, 300, - 600, 1200, 1800, 2400, - 4800, 9600, 19200, 38400 }, - { - 0, 57600, 115200, 230400, - 460800, 150, 200, 921600, - 600, 1200, 1800, 2400, - 4800, 9600, 19200, 38400 }, - { - 0, 57600, 76800, 115200, - 131657, 153600, 230400, 460800, - 921600, 1200, 1800, 2400, - 4800, 9600, 19200, 38400 }, - { - 0, 57600, 115200, 230400, - 460800, 150, 200, 921600, - 600, 1200, 1800, 2400, - 4800, 9600, 19200, 38400 } - }; - - baud = C_BAUD(ch->uart_port.info->tty) & 0xff; - - if (ch->ch_c_cflag & CBAUDEX) - iindex = 1; - - jindex = baud; - - if ((iindex >= 0) && (iindex < 4) && (jindex >= 0) && (jindex < 16)) - baud = bauds[iindex][jindex]; - else { - jsm_printk(IOCTL, DEBUG, &ch->ch_bd->pci_dev, - "baud indices were out of range (%d)(%d)", - iindex, jindex); - baud = 0; + } else { + int i; + unsigned int cflag; + static struct { + unsigned int rate; + unsigned int cflag; + } baud_rates[] = { + { 921600, B921600 }, + { 460800, B460800 }, + { 230400, B230400 }, + { 115200, B115200 }, + { 57600, B57600 }, + { 38400, B38400 }, + { 19200, B19200 }, + { 9600, B9600 }, + { 4800, B4800 }, + { 2400, B2400 }, + { 1200, B1200 }, + { 600, B600 }, + { 300, B300 }, + { 200, B200 }, + { 150, B150 }, + { 134, B134 }, + { 110, B110 }, + { 75, B75 }, + { 50, B50 }, + }; + + cflag = C_BAUD(ch->uart_port.info->tty); + baud = 9600; + for (i = 0; i < ARRAY_SIZE(baud_rates); i++) { + if (baud_rates[i].cflag == cflag) { + baud = baud_rates[i].rate; + break; } - - if (baud == 0) - baud = 9600; - - if (ch->ch_flags & CH_BAUD0) - ch->ch_flags &= ~(CH_BAUD0); } + if (ch->ch_flags & CH_BAUD0) + ch->ch_flags &= ~(CH_BAUD0); + } + if (ch->ch_c_cflag & PARENB) lcr |= UART_LCR_PARITY; diff --git a/drivers/serial/jsm/jsm_tty.c b/drivers/serial/jsm/jsm_tty.c index 6fa0d62d6f6..4d48b625cd3 100644 --- a/drivers/serial/jsm/jsm_tty.c +++ b/drivers/serial/jsm/jsm_tty.c @@ -20,8 +20,10 @@ * * Contact Information: * Scott H Kilau <Scott_Kilau@digi.com> - * Wendy Xiong <wendyx@us.ltcfwd.linux.ibm.com> - * + * Ananda Venkatarman <mansarov@us.ibm.com> + * Modifications: + * 01/19/06: changed jsm_input routine to use the dynamically allocated + * tty_buffer changes. Contributors: Scott Kilau and Ananda V. ***********************************************************************/ #include <linux/tty.h> #include <linux/tty_flip.h> @@ -497,16 +499,15 @@ void jsm_input(struct jsm_channel *ch) { struct jsm_board *bd; struct tty_struct *tp; + struct tty_ldisc *ld; u32 rmask; u16 head; u16 tail; int data_len; unsigned long lock_flags; - int flip_len; + int flip_len = 0; int len = 0; int n = 0; - char *buf = NULL; - char *buf2 = NULL; int s = 0; int i = 0; @@ -574,56 +575,50 @@ void jsm_input(struct jsm_channel *ch) /* * If the rxbuf is empty and we are not throttled, put as much - * as we can directly into the linux TTY flip buffer. - * The jsm_rawreadok case takes advantage of carnal knowledge that - * the char_buf and the flag_buf are next to each other and - * are each of (2 * TTY_FLIPBUF_SIZE) size. + * as we can directly into the linux TTY buffer. * - * NOTE: if(!tty->real_raw), the call to ldisc.receive_buf - *actually still uses the flag buffer, so you can't - *use it for input data */ - if (jsm_rawreadok) { - if (tp->real_raw) - flip_len = MYFLIPLEN; - else - flip_len = 2 * TTY_FLIPBUF_SIZE; - } else - flip_len = TTY_FLIPBUF_SIZE - tp->flip.count; + flip_len = TTY_FLIPBUF_SIZE; len = min(data_len, flip_len); len = min(len, (N_TTY_BUF_SIZE - 1) - tp->read_cnt); + ld = tty_ldisc_ref(tp); - if (len <= 0) { - spin_unlock_irqrestore(&ch->ch_lock, lock_flags); - jsm_printk(READ, INFO, &ch->ch_bd->pci_dev, "jsm_input 1\n"); - return; - } + /* + * If the DONT_FLIP flag is on, don't flush our buffer, and act + * like the ld doesn't have any space to put the data right now. + */ + if (test_bit(TTY_DONT_FLIP, &tp->flags)) + len = 0; /* - * If we're bypassing flip buffers on rx, we can blast it - * right into the beginning of the buffer. + * If we were unable to get a reference to the ld, + * don't flush our buffer, and act like the ld doesn't + * have any space to put the data right now. */ - if (jsm_rawreadok) { - if (tp->real_raw) { - if (ch->ch_flags & CH_FLIPBUF_IN_USE) { - jsm_printk(READ, INFO, &ch->ch_bd->pci_dev, - "JSM - FLIPBUF in use. delaying input\n"); - spin_unlock_irqrestore(&ch->ch_lock, lock_flags); - return; - } - ch->ch_flags |= CH_FLIPBUF_IN_USE; - buf = ch->ch_bd->flipbuf; - buf2 = NULL; - } else { - buf = tp->flip.char_buf; - buf2 = tp->flip.flag_buf; - } + if (!ld) { + len = 0; } else { - buf = tp->flip.char_buf_ptr; - buf2 = tp->flip.flag_buf_ptr; + /* + * If ld doesn't have a pointer to a receive_buf function, + * flush the data, then act like the ld doesn't have any + * space to put the data right now. + */ + if (!ld->receive_buf) { + ch->ch_r_head = ch->ch_r_tail; + len = 0; + } } + if (len <= 0) { + spin_unlock_irqrestore(&ch->ch_lock, lock_flags); + jsm_printk(READ, INFO, &ch->ch_bd->pci_dev, "jsm_input 1\n"); + if (ld) + tty_ldisc_deref(ld); + return; + } + + len = tty_buffer_request_room(tp, len); n = len; /* @@ -638,121 +633,47 @@ void jsm_input(struct jsm_channel *ch) if (s <= 0) break; - memcpy(buf, ch->ch_rqueue + tail, s); - - /* buf2 is only set when port isn't raw */ - if (buf2) - memcpy(buf2, ch->ch_equeue + tail, s); - - tail += s; - buf += s; - if (buf2) - buf2 += s; - n -= s; - /* Flip queue if needed */ - tail &= rmask; - } + /* + * If conditions are such that ld needs to see all + * UART errors, we will have to walk each character + * and error byte and send them to the buffer one at + * a time. + */ - /* - * In high performance mode, we don't have to update - * flag_buf or any of the counts or pointers into flip buf. - */ - if (!jsm_rawreadok) { if (I_PARMRK(tp) || I_BRKINT(tp) || I_INPCK(tp)) { - for (i = 0; i < len; i++) { + for (i = 0; i < s; i++) { /* * Give the Linux ld the flags in the * format it likes. */ - if (tp->flip.flag_buf_ptr[i] & UART_LSR_BI) - tp->flip.flag_buf_ptr[i] = TTY_BREAK; - else if (tp->flip.flag_buf_ptr[i] & UART_LSR_PE) - tp->flip.flag_buf_ptr[i] = TTY_PARITY; - else if (tp->flip.flag_buf_ptr[i] & UART_LSR_FE) - tp->flip.flag_buf_ptr[i] = TTY_FRAME; + if (*(ch->ch_equeue +tail +i) & UART_LSR_BI) + tty_insert_flip_char(tp, *(ch->ch_rqueue +tail +i), TTY_BREAK); + else if (*(ch->ch_equeue +tail +i) & UART_LSR_PE) + tty_insert_flip_char(tp, *(ch->ch_rqueue +tail +i), TTY_PARITY); + else if (*(ch->ch_equeue +tail +i) & UART_LSR_FE) + tty_insert_flip_char(tp, *(ch->ch_rqueue +tail +i), TTY_FRAME); else - tp->flip.flag_buf_ptr[i] = TTY_NORMAL; + tty_insert_flip_char(tp, *(ch->ch_rqueue +tail +i), TTY_NORMAL); } } else { - memset(tp->flip.flag_buf_ptr, 0, len); + tty_insert_flip_string(tp, ch->ch_rqueue + tail, s) ; } - - tp->flip.char_buf_ptr += len; - tp->flip.flag_buf_ptr += len; - tp->flip.count += len; - } - else if (!tp->real_raw) { - if (I_PARMRK(tp) || I_BRKINT(tp) || I_INPCK(tp)) { - for (i = 0; i < len; i++) { - /* - * Give the Linux ld the flags in the - * format it likes. - */ - if (tp->flip.flag_buf_ptr[i] & UART_LSR_BI) - tp->flip.flag_buf_ptr[i] = TTY_BREAK; - else if (tp->flip.flag_buf_ptr[i] & UART_LSR_PE) - tp->flip.flag_buf_ptr[i] = TTY_PARITY; - else if (tp->flip.flag_buf_ptr[i] & UART_LSR_FE) - tp->flip.flag_buf_ptr[i] = TTY_FRAME; - else - tp->flip.flag_buf_ptr[i] = TTY_NORMAL; - } - } else - memset(tp->flip.flag_buf, 0, len); + tail += s; + n -= s; + /* Flip queue if needed */ + tail &= rmask; } - /* - * If we're doing raw reads, jam it right into the - * line disc bypassing the flip buffers. - */ - if (jsm_rawreadok) { - if (tp->real_raw) { - ch->ch_r_tail = tail & rmask; - ch->ch_e_tail = tail & rmask; - - jsm_check_queue_flow_control(ch); - - /* !!! WE *MUST* LET GO OF ALL LOCKS BEFORE CALLING RECEIVE BUF !!! */ + ch->ch_r_tail = tail & rmask; + ch->ch_e_tail = tail & rmask; + jsm_check_queue_flow_control(ch); + spin_unlock_irqrestore(&ch->ch_lock, lock_flags); - spin_unlock_irqrestore(&ch->ch_lock, lock_flags); + /* Tell the tty layer its okay to "eat" the data now */ + tty_flip_buffer_push(tp); - jsm_printk(READ, INFO, &ch->ch_bd->pci_dev, - "jsm_input. %d real_raw len:%d calling receive_buf for board %d\n", - __LINE__, len, ch->ch_bd->boardnum); - tp->ldisc.receive_buf(tp, ch->ch_bd->flipbuf, NULL, len); - - /* Allow use of channel flip buffer again */ - spin_lock_irqsave(&ch->ch_lock, lock_flags); - ch->ch_flags &= ~CH_FLIPBUF_IN_USE; - spin_unlock_irqrestore(&ch->ch_lock, lock_flags); - - } else { - ch->ch_r_tail = tail & rmask; - ch->ch_e_tail = tail & rmask; - - jsm_check_queue_flow_control(ch); - - /* !!! WE *MUST* LET GO OF ALL LOCKS BEFORE CALLING RECEIVE BUF !!! */ - spin_unlock_irqrestore(&ch->ch_lock, lock_flags); - - jsm_printk(READ, INFO, &ch->ch_bd->pci_dev, - "jsm_input. %d not real_raw len:%d calling receive_buf for board %d\n", - __LINE__, len, ch->ch_bd->boardnum); - - tp->ldisc.receive_buf(tp, tp->flip.char_buf, tp->flip.flag_buf, len); - } - } else { - ch->ch_r_tail = tail & rmask; - ch->ch_e_tail = tail & rmask; - - jsm_check_queue_flow_control(ch); - - spin_unlock_irqrestore(&ch->ch_lock, lock_flags); - - jsm_printk(READ, INFO, &ch->ch_bd->pci_dev, - "jsm_input. %d not jsm_read raw okay scheduling flip\n", __LINE__); - tty_schedule_flip(tp); - } + if (ld) + tty_ldisc_deref(ld); jsm_printk(IOCTL, INFO, &ch->ch_bd->pci_dev, "finish\n"); } diff --git a/drivers/serial/m32r_sio.c b/drivers/serial/m32r_sio.c index b48066a64a7..242a0410439 100644 --- a/drivers/serial/m32r_sio.c +++ b/drivers/serial/m32r_sio.c @@ -80,7 +80,7 @@ #include <asm/serial.h> /* Standard COM flags */ -#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) +#define STD_COM_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST) /* * SERIAL_PORT_DFNS tells us about built-in ports that have no diff --git a/drivers/serial/m32r_sio.h b/drivers/serial/m32r_sio.h index 07d0dd80aa3..7c3ec24f7e5 100644 --- a/drivers/serial/m32r_sio.h +++ b/drivers/serial/m32r_sio.h @@ -37,7 +37,7 @@ struct old_serial_port { unsigned int irq; unsigned int flags; unsigned char io_type; - unsigned char *iomem_base; + unsigned char __iomem *iomem_base; unsigned short iomem_reg_shift; }; diff --git a/drivers/serial/mcfserial.c b/drivers/serial/mcfserial.c index d957a3a9edf..8cbbb954df2 100644 --- a/drivers/serial/mcfserial.c +++ b/drivers/serial/mcfserial.c @@ -57,20 +57,16 @@ struct timer_list mcfrs_timer_struct; * keep going. Perhaps one day the cflag settings for the * console can be used instead. */ -#if defined(CONFIG_ARNEWSH) || defined(CONFIG_FREESCALE) || \ - defined(CONFIG_senTec) || defined(CONFIG_SNEHA) -#define CONSOLE_BAUD_RATE 19200 -#define DEFAULT_CBAUD B19200 -#endif - #if defined(CONFIG_HW_FEITH) #define CONSOLE_BAUD_RATE 38400 #define DEFAULT_CBAUD B38400 -#endif - -#if defined(CONFIG_MOD5272) || defined(CONFIG_M5208EVB) +#elif defined(CONFIG_MOD5272) || defined(CONFIG_M5208EVB) #define CONSOLE_BAUD_RATE 115200 #define DEFAULT_CBAUD B115200 +#elif defined(CONFIG_ARNEWSH) || defined(CONFIG_FREESCALE) || \ + defined(CONFIG_senTec) || defined(CONFIG_SNEHA) +#define CONSOLE_BAUD_RATE 19200 +#define DEFAULT_CBAUD B19200 #endif #ifndef CONSOLE_BAUD_RATE @@ -350,8 +346,7 @@ static inline void receive_chars(struct mcf_serial *info) } tty_insert_flip_char(tty, ch, flag); } - - schedule_work(&tty->flip.work); + tty_schedule_flip(tty); return; } diff --git a/drivers/serial/mux.c b/drivers/serial/mux.c index 4e49168c317..868eaf4a1a6 100644 --- a/drivers/serial/mux.c +++ b/drivers/serial/mux.c @@ -462,7 +462,7 @@ static int __init mux_probe(struct parisc_device *dev) port->mapbase = dev->hpa.start + MUX_OFFSET + (i * MUX_LINE_OFFSET); port->membase = ioremap(port->mapbase, MUX_LINE_OFFSET); - port->iotype = SERIAL_IO_MEM; + port->iotype = UPIO_MEM; port->type = PORT_MUX; port->irq = NO_IRQ; port->uartclk = 0; diff --git a/drivers/serial/pmac_zilog.c b/drivers/serial/pmac_zilog.c index 4e03a87f3fb..9b7ed58cb53 100644 --- a/drivers/serial/pmac_zilog.c +++ b/drivers/serial/pmac_zilog.c @@ -1492,7 +1492,7 @@ no_dma: /* * Init remaining bits of "port" structure */ - uap->port.iotype = SERIAL_IO_MEM; + uap->port.iotype = UPIO_MEM; uap->port.irq = np->intrs[0].line; uap->port.uartclk = ZS_CLOCK; uap->port.fifosize = 1; diff --git a/drivers/serial/s3c2410.c b/drivers/serial/s3c2410.c index eb4883efb7c..7410e093a6b 100644 --- a/drivers/serial/s3c2410.c +++ b/drivers/serial/s3c2410.c @@ -161,7 +161,11 @@ s3c24xx_serial_dbg(const char *fmt, ...) /* we can support 3 uarts, but not always use them */ +#ifdef CONFIG_CPU_S3C2400 +#define NR_PORTS (2) +#else #define NR_PORTS (3) +#endif /* port irq numbers */ @@ -1060,7 +1064,7 @@ static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport, dbg("resource %p (%lx..%lx)\n", res, res->start, res->end); port->mapbase = res->start; - port->membase = S3C24XX_VA_UART + (res->start - S3C2410_PA_UART); + port->membase = S3C24XX_VA_UART + (res->start - S3C24XX_PA_UART); port->irq = platform_get_irq(platdev, 0); ourport->clk = clk_get(&platdev->dev, "uart"); diff --git a/drivers/serial/sa1100.c b/drivers/serial/sa1100.c index 1bd93168f50..2c00b862585 100644 --- a/drivers/serial/sa1100.c +++ b/drivers/serial/sa1100.c @@ -628,7 +628,7 @@ static void __init sa1100_init_ports(void) sa1100_ports[i].port.ops = &sa1100_pops; sa1100_ports[i].port.fifosize = 8; sa1100_ports[i].port.line = i; - sa1100_ports[i].port.iotype = SERIAL_IO_MEM; + sa1100_ports[i].port.iotype = UPIO_MEM; init_timer(&sa1100_ports[i].timer); sa1100_ports[i].timer.function = sa1100_timeout; sa1100_ports[i].timer.data = (unsigned long)&sa1100_ports[i]; @@ -665,21 +665,21 @@ void __init sa1100_register_uart(int idx, int port) sa1100_ports[idx].port.membase = (void __iomem *)&Ser1UTCR0; sa1100_ports[idx].port.mapbase = _Ser1UTCR0; sa1100_ports[idx].port.irq = IRQ_Ser1UART; - sa1100_ports[idx].port.flags = ASYNC_BOOT_AUTOCONF; + sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF; break; case 2: sa1100_ports[idx].port.membase = (void __iomem *)&Ser2UTCR0; sa1100_ports[idx].port.mapbase = _Ser2UTCR0; sa1100_ports[idx].port.irq = IRQ_Ser2ICP; - sa1100_ports[idx].port.flags = ASYNC_BOOT_AUTOCONF; + sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF; break; case 3: sa1100_ports[idx].port.membase = (void __iomem *)&Ser3UTCR0; sa1100_ports[idx].port.mapbase = _Ser3UTCR0; sa1100_ports[idx].port.irq = IRQ_Ser3UART; - sa1100_ports[idx].port.flags = ASYNC_BOOT_AUTOCONF; + sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF; break; default: diff --git a/drivers/serial/serial_core.c b/drivers/serial/serial_core.c index 943770470b9..95fb4939c67 100644 --- a/drivers/serial/serial_core.c +++ b/drivers/serial/serial_core.c @@ -332,7 +332,7 @@ uart_get_baud_rate(struct uart_port *port, struct termios *termios, struct termios *old, unsigned int min, unsigned int max) { unsigned int try, baud, altbaud = 38400; - unsigned int flags = port->flags & UPF_SPD_MASK; + upf_t flags = port->flags & UPF_SPD_MASK; if (flags == UPF_SPD_HI) altbaud = 57600; @@ -615,8 +615,9 @@ static int uart_set_info(struct uart_state *state, struct serial_struct new_serial; struct uart_port *port = state->port; unsigned long new_port; - unsigned int change_irq, change_port, old_flags, closing_wait; + unsigned int change_irq, change_port, closing_wait; unsigned int old_custom_divisor, close_delay; + upf_t old_flags, new_flags; int retval = 0; if (copy_from_user(&new_serial, newinfo, sizeof(new_serial))) @@ -655,6 +656,7 @@ static int uart_set_info(struct uart_state *state, new_serial.type != port->type; old_flags = port->flags; + new_flags = new_serial.flags; old_custom_divisor = port->custom_divisor; if (!capable(CAP_SYS_ADMIN)) { @@ -664,10 +666,10 @@ static int uart_set_info(struct uart_state *state, (close_delay != state->close_delay) || (closing_wait != state->closing_wait) || (new_serial.xmit_fifo_size != port->fifosize) || - (((new_serial.flags ^ old_flags) & ~UPF_USR_MASK) != 0)) + (((new_flags ^ old_flags) & ~UPF_USR_MASK) != 0)) goto exit; port->flags = ((port->flags & ~UPF_USR_MASK) | - (new_serial.flags & UPF_USR_MASK)); + (new_flags & UPF_USR_MASK)); port->custom_divisor = new_serial.custom_divisor; goto check_and_exit; } @@ -764,7 +766,7 @@ static int uart_set_info(struct uart_state *state, port->irq = new_serial.irq; port->uartclk = new_serial.baud_base * 16; port->flags = (port->flags & ~UPF_CHANGE_MASK) | - (new_serial.flags & UPF_CHANGE_MASK); + (new_flags & UPF_CHANGE_MASK); port->custom_divisor = new_serial.custom_divisor; state->close_delay = close_delay; state->closing_wait = closing_wait; @@ -1870,7 +1872,7 @@ int uart_suspend_port(struct uart_driver *drv, struct uart_port *port) mutex_lock(&state->mutex); if (state->info && state->info->flags & UIF_INITIALIZED) { - struct uart_ops *ops = port->ops; + const struct uart_ops *ops = port->ops; spin_lock_irq(&port->lock); ops->stop_tx(port); @@ -1932,7 +1934,7 @@ int uart_resume_port(struct uart_driver *drv, struct uart_port *port) } if (state->info && state->info->flags & UIF_INITIALIZED) { - struct uart_ops *ops = port->ops; + const struct uart_ops *ops = port->ops; int ret; ops->set_mctrl(port, 0); @@ -2235,7 +2237,7 @@ int uart_add_one_port(struct uart_driver *drv, struct uart_port *port) * If this port is a console, then the spinlock is already * initialised. */ - if (!uart_console(port)) + if (!(uart_console(port) && (port->cons->flags & CON_ENABLED))) spin_lock_init(&port->lock); uart_configure_port(drv, state, port); diff --git a/drivers/serial/serial_lh7a40x.c b/drivers/serial/serial_lh7a40x.c index d4a1f0e798c..04186eaae22 100644 --- a/drivers/serial/serial_lh7a40x.c +++ b/drivers/serial/serial_lh7a40x.c @@ -501,12 +501,12 @@ static struct uart_port_lh7a40x lh7a40x_ports[DEV_NR] = { .port = { .membase = (void*) io_p2v (UART1_PHYS), .mapbase = UART1_PHYS, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .irq = IRQ_UART1INTR, .uartclk = 14745600/2, .fifosize = 16, .ops = &lh7a40x_uart_ops, - .flags = ASYNC_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF, .line = 0, }, }, @@ -514,12 +514,12 @@ static struct uart_port_lh7a40x lh7a40x_ports[DEV_NR] = { .port = { .membase = (void*) io_p2v (UART2_PHYS), .mapbase = UART2_PHYS, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .irq = IRQ_UART2INTR, .uartclk = 14745600/2, .fifosize = 16, .ops = &lh7a40x_uart_ops, - .flags = ASYNC_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF, .line = 1, }, }, @@ -527,12 +527,12 @@ static struct uart_port_lh7a40x lh7a40x_ports[DEV_NR] = { .port = { .membase = (void*) io_p2v (UART3_PHYS), .mapbase = UART3_PHYS, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .irq = IRQ_UART3INTR, .uartclk = 14745600/2, .fifosize = 16, .ops = &lh7a40x_uart_ops, - .flags = ASYNC_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF, .line = 2, }, }, diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c index a9e07075962..44f6bf79bbe 100644 --- a/drivers/serial/sh-sci.c +++ b/drivers/serial/sh-sci.c @@ -42,6 +42,7 @@ #include <linux/delay.h> #include <linux/console.h> #include <linux/bitops.h> +#include <linux/generic_serial.h> #ifdef CONFIG_CPU_FREQ #include <linux/notifier.h> @@ -53,7 +54,9 @@ #include <asm/irq.h> #include <asm/uaccess.h> -#include <linux/generic_serial.h> +#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) +#include <asm/clock.h> +#endif #ifdef CONFIG_SH_STANDARD_BIOS #include <asm/sh_bios.h> @@ -86,9 +89,11 @@ static void sci_stop_rx(struct uart_port *port); static int sci_request_irq(struct sci_port *port); static void sci_free_irq(struct sci_port *port); -static struct sci_port sci_ports[SCI_NPORTS]; +static struct sci_port sci_ports[]; static struct uart_driver sci_uart_driver; +#define SCI_NPORTS sci_uart_driver.nr + #if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB) static void handle_error(struct uart_port *port) @@ -168,7 +173,7 @@ static void put_string(struct sci_port *sci_port, const char *buffer, int count) int usegdb=0; #ifdef CONFIG_SH_STANDARD_BIOS - /* This call only does a trap the first time it is + /* This call only does a trap the first time it is * called, and so is safe to do here unconditionally */ usegdb |= sh_bios_in_gdb_mode(); @@ -324,47 +329,46 @@ static void sci_init_pins_sci(struct uart_port* port, unsigned int cflag) /* tx mark output*/ H8300_SCI_DR(ch) |= h8300_sci_pins[ch].tx; } -#else -static void sci_init_pins_sci(struct uart_port *port, unsigned int cflag) -{ -} #endif #endif #if defined(SCIF_ONLY) || defined(SCI_AND_SCIF) -#if defined(CONFIG_CPU_SH3) -/* For SH7705, SH7707, SH7709, SH7709A, SH7729, SH7300*/ +#if defined(CONFIG_CPU_SUBTYPE_SH7300) +/* SH7300 doesn't use RTS/CTS */ +static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) +{ + sci_out(port, SCFCR, 0); +} +#elif defined(CONFIG_CPU_SH3) +/* For SH7705, SH7707, SH7709, SH7709A, SH7729 */ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) { unsigned int fcr_val = 0; -#if !defined(CONFIG_CPU_SUBTYPE_SH7300) /* SH7300 doesn't use RTS/CTS */ - { - unsigned short data; + unsigned short data; + + /* We need to set SCPCR to enable RTS/CTS */ + data = ctrl_inw(SCPCR); + /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/ + ctrl_outw(data & 0x0fcf, SCPCR); - /* We need to set SCPCR to enable RTS/CTS */ - data = ctrl_inw(SCPCR); - /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/ - ctrl_outw(data&0x0fcf, SCPCR); - } if (cflag & CRTSCTS) fcr_val |= SCFCR_MCE; else { - unsigned short data; - /* We need to set SCPCR to enable RTS/CTS */ data = ctrl_inw(SCPCR); /* Clear out SCP7MD1,0, SCP4MD1,0, Set SCP6MD1,0 = {01} (output) */ - ctrl_outw((data&0x0fcf)|0x1000, SCPCR); + ctrl_outw((data & 0x0fcf) | 0x1000, SCPCR); data = ctrl_inb(SCPDR); /* Set /RTS2 (bit6) = 0 */ - ctrl_outb(data&0xbf, SCPDR); + ctrl_outb(data & 0xbf, SCPDR); } -#endif + sci_out(port, SCFCR, fcr_val); } +#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) static void sci_init_pins_irda(struct uart_port *port, unsigned int cflag) { unsigned int fcr_val = 0; @@ -374,7 +378,7 @@ static void sci_init_pins_irda(struct uart_port *port, unsigned int cflag) sci_out(port, SCFCR, fcr_val); } - +#endif #else /* For SH7750 */ @@ -385,7 +389,11 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) if (cflag & CRTSCTS) { fcr_val |= SCFCR_MCE; } else { +#ifdef CONFIG_CPU_SUBTYPE_SH7780 + ctrl_outw(0x0080, SCSPTR0); /* Set RTS = 1 */ +#else ctrl_outw(0x0080, SCSPTR2); /* Set RTS = 1 */ +#endif } sci_out(port, SCFCR, fcr_val); } @@ -422,7 +430,11 @@ static void sci_transmit_chars(struct uart_port *port) #if !defined(SCI_ONLY) if (port->type == PORT_SCIF) { +#if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780) + txroom = SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0x7f); +#else txroom = SCIF_TXROOM_MAX - (sci_in(port, SCFDR)>>8); +#endif } else { txroom = (sci_in(port, SCxSR) & SCI_TDRE)?1:0; } @@ -491,7 +503,11 @@ static inline void sci_receive_chars(struct uart_port *port, while (1) { #if !defined(SCI_ONLY) if (port->type == PORT_SCIF) { +#if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780) + count = sci_in(port, SCRFDR) & 0x7f; +#else count = sci_in(port, SCFDR)&SCIF_RFDC_MASK ; +#endif } else { count = (sci_in(port, SCxSR)&SCxSR_RDxF(port))?1:0; } @@ -652,7 +668,7 @@ static inline int sci_handle_breaks(struct uart_port *port) struct tty_struct *tty = port->info->tty; struct sci_port *s = &sci_ports[port->line]; - if (!s->break_flag && status & SCxSR_BRK(port)) + if (!s->break_flag && status & SCxSR_BRK(port)) { #if defined(CONFIG_CPU_SH3) /* Debounce break */ s->break_flag = 1; @@ -783,6 +799,7 @@ static int sci_notifier(struct notifier_block *self, unsigned long phase, void * (phase == CPUFREQ_RESUMECHANGE)){ for (i = 0; i < SCI_NPORTS; i++) { struct uart_port *port = &sci_ports[i].port; + struct clk *clk; /* * Update the uartclk per-port if frequency has @@ -795,7 +812,9 @@ static int sci_notifier(struct notifier_block *self, unsigned long phase, void * * * Clean this up later.. */ - port->uartclk = current_cpu_data.module_clock * 16; + clk = clk_get("module_clk"); + port->uartclk = clk_get_rate(clk) * 16; + clk_put(clk); } printk("%s: got a postchange notification for cpu %d (old %d, new %d)\n", @@ -1008,15 +1027,20 @@ static void sci_set_termios(struct uart_port *port, struct termios *termios, sci_out(port, SCSMR, smr_val); switch (baud) { - case 0: t = -1; break; - case 2400: t = BPS_2400; break; - case 4800: t = BPS_4800; break; - case 9600: t = BPS_9600; break; - case 19200: t = BPS_19200; break; - case 38400: t = BPS_38400; break; - case 57600: t = BPS_57600; break; - case 115200: t = BPS_115200; break; - default: t = SCBRR_VALUE(baud); break; + case 0: + t = -1; + break; + default: + { +#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) + struct clk *clk = clk_get("module_clk"); + t = SCBRR_VALUE(baud, clk_get_rate(clk)); + clk_put(clk); +#else + t = SCBRR_VALUE(baud); +#endif + } + break; } if (t > 0) { @@ -1030,7 +1054,9 @@ static void sci_set_termios(struct uart_port *port, struct termios *termios, udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */ } - s->init_pins(port, termios->c_cflag); + if (likely(s->init_pins)) + s->init_pins(port, termios->c_cflag); + sci_out(port, SCSCR, SCSCR_INIT(port)); if ((termios->c_cflag & CREAD) != 0) @@ -1107,31 +1133,30 @@ static struct uart_ops sci_uart_ops = { .verify_port = sci_verify_port, }; -static struct sci_port sci_ports[SCI_NPORTS] = { +static struct sci_port sci_ports[] = { #if defined(CONFIG_CPU_SUBTYPE_SH7708) { .port = { .membase = (void *)0xfffffe80, .mapbase = 0xfffffe80, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .irq = 25, .ops = &sci_uart_ops, - .flags = ASYNC_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF, .line = 0, }, .type = PORT_SCI, .irqs = SCI_IRQS, - .init_pins = sci_init_pins_sci, }, #elif defined(CONFIG_CPU_SUBTYPE_SH7705) { .port = { .membase = (void *)SCIF0, .mapbase = SCIF0, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .irq = 55, .ops = &sci_uart_ops, - .flags = ASYNC_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF, .line = 0, }, .type = PORT_SCIF, @@ -1142,10 +1167,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { .port = { .membase = (void *)SCIF2, .mapbase = SCIF2, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .irq = 59, .ops = &sci_uart_ops, - .flags = ASYNC_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF, .line = 1, }, .type = PORT_SCIF, @@ -1157,24 +1182,23 @@ static struct sci_port sci_ports[SCI_NPORTS] = { .port = { .membase = (void *)0xfffffe80, .mapbase = 0xfffffe80, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .irq = 25, .ops = &sci_uart_ops, - .flags = ASYNC_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF, .line = 0, }, .type = PORT_SCI, .irqs = SCI_IRQS, - .init_pins = sci_init_pins_sci, }, { .port = { .membase = (void *)0xa4000150, .mapbase = 0xa4000150, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .irq = 59, .ops = &sci_uart_ops, - .flags = ASYNC_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF, .line = 1, }, .type = PORT_SCIF, @@ -1185,10 +1209,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { .port = { .membase = (void *)0xa4000140, .mapbase = 0xa4000140, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .irq = 55, .ops = &sci_uart_ops, - .flags = ASYNC_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF, .line = 2, }, .type = PORT_IRDA, @@ -1200,10 +1224,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { .port = { .membase = (void *)0xA4430000, .mapbase = 0xA4430000, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .irq = 25, .ops = &sci_uart_ops, - .flags = ASYNC_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF, .line = 0, }, .type = PORT_SCIF, @@ -1215,25 +1239,25 @@ static struct sci_port sci_ports[SCI_NPORTS] = { .port = { .membase = (void *)0xffe00000, .mapbase = 0xffe00000, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .irq = 25, .ops = &sci_uart_ops, - .flags = ASYNC_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF, .line = 0, }, .type = PORT_SCIF, .irqs = SH73180_SCIF_IRQS, .init_pins = sci_init_pins_scif, }, -#elif defined(CONFIG_SH_RTS7751R2D) +#elif defined(CONFIG_CPU_SUBTYPE_SH4_202) { .port = { .membase = (void *)0xffe80000, .mapbase = 0xffe80000, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .irq = 43, .ops = &sci_uart_ops, - .flags = ASYNC_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF, .line = 0, }, .type = PORT_SCIF, @@ -1245,24 +1269,23 @@ static struct sci_port sci_ports[SCI_NPORTS] = { .port = { .membase = (void *)0xffe00000, .mapbase = 0xffe00000, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .irq = 25, .ops = &sci_uart_ops, - .flags = ASYNC_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF, .line = 0, }, .type = PORT_SCI, .irqs = SCI_IRQS, - .init_pins = sci_init_pins_sci, }, { .port = { .membase = (void *)0xffe80000, .mapbase = 0xffe80000, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .irq = 43, .ops = &sci_uart_ops, - .flags = ASYNC_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF, .line = 1, }, .type = PORT_SCIF, @@ -1274,10 +1297,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { .port = { .membase = (void *)0xfe600000, .mapbase = 0xfe600000, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .irq = 55, .ops = &sci_uart_ops, - .flags = ASYNC_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF, .line = 0, }, .type = PORT_SCIF, @@ -1288,10 +1311,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { .port = { .membase = (void *)0xfe610000, .mapbase = 0xfe610000, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .irq = 75, .ops = &sci_uart_ops, - .flags = ASYNC_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF, .line = 1, }, .type = PORT_SCIF, @@ -1302,40 +1325,25 @@ static struct sci_port sci_ports[SCI_NPORTS] = { .port = { .membase = (void *)0xfe620000, .mapbase = 0xfe620000, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .irq = 79, .ops = &sci_uart_ops, - .flags = ASYNC_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF, .line = 2, }, .type = PORT_SCIF, .irqs = SH7760_SCIF2_IRQS, .init_pins = sci_init_pins_scif, }, -#elif defined(CONFIG_CPU_SUBTYPE_SH4_202) - { - .port = { - .membase = (void *)0xffe80000, - .mapbase = 0xffe80000, - .iotype = SERIAL_IO_MEM, - .irq = 43, - .ops = &sci_uart_ops, - .flags = ASYNC_BOOT_AUTOCONF, - .line = 0, - }, - .type = PORT_SCIF, - .irqs = SH4_SCIF_IRQS, - .init_pins = sci_init_pins_scif, - }, #elif defined(CONFIG_CPU_SUBTYPE_ST40STB1) { .port = { .membase = (void *)0xffe00000, .mapbase = 0xffe00000, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .irq = 26, .ops = &sci_uart_ops, - .flags = ASYNC_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF, .line = 0, }, .type = PORT_SCIF, @@ -1346,10 +1354,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { .port = { .membase = (void *)0xffe80000, .mapbase = 0xffe80000, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .irq = 43, .ops = &sci_uart_ops, - .flags = ASYNC_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF, .line = 1, }, .type = PORT_SCIF, @@ -1359,10 +1367,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { #elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103) { .port = { - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .irq = 42, .ops = &sci_uart_ops, - .flags = ASYNC_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF, .line = 0, }, .type = PORT_SCIF, @@ -1374,10 +1382,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { .port = { .membase = (void *)0x00ffffb0, .mapbase = 0x00ffffb0, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .irq = 54, .ops = &sci_uart_ops, - .flags = ASYNC_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF, .line = 0, }, .type = PORT_SCI, @@ -1388,10 +1396,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { .port = { .membase = (void *)0x00ffffb8, .mapbase = 0x00ffffb8, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .irq = 58, .ops = &sci_uart_ops, - .flags = ASYNC_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF, .line = 1, }, .type = PORT_SCI, @@ -1402,10 +1410,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { .port = { .membase = (void *)0x00ffffc0, .mapbase = 0x00ffffc0, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .irq = 62, .ops = &sci_uart_ops, - .flags = ASYNC_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF, .line = 2, }, .type = PORT_SCI, @@ -1417,10 +1425,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { .port = { .membase = (void *)0x00ffff78, .mapbase = 0x00ffff78, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .irq = 90, .ops = &sci_uart_ops, - .flags = ASYNC_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF, .line = 0, }, .type = PORT_SCI, @@ -1431,10 +1439,10 @@ static struct sci_port sci_ports[SCI_NPORTS] = { .port = { .membase = (void *)0x00ffff80, .mapbase = 0x00ffff80, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .irq = 94, .ops = &sci_uart_ops, - .flags = ASYNC_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF, .line = 1, }, .type = PORT_SCI, @@ -1445,16 +1453,88 @@ static struct sci_port sci_ports[SCI_NPORTS] = { .port = { .membase = (void *)0x00ffff88, .mapbase = 0x00ffff88, - .iotype = SERIAL_IO_MEM, + .iotype = UPIO_MEM, .irq = 98, .ops = &sci_uart_ops, - .flags = ASYNC_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF, .line = 2, }, .type = PORT_SCI, .irqs = H8S_SCI_IRQS2, .init_pins = sci_init_pins_sci, }, +#elif defined(CONFIG_CPU_SUBTYPE_SH7770) + { + .port = { + .membase = (void *)0xff923000, + .mapbase = 0xff923000, + .iotype = UPIO_MEM, + .irq = 61, + .ops = &sci_uart_ops, + .flags = UPF_BOOT_AUTOCONF, + .line = 0, + }, + .type = PORT_SCIF, + .irqs = SH7770_SCIF0_IRQS, + .init_pins = sci_init_pins_scif, + }, + { + .port = { + .membase = (void *)0xff924000, + .mapbase = 0xff924000, + .iotype = UPIO_MEM, + .irq = 62, + .ops = &sci_uart_ops, + .flags = UPF_BOOT_AUTOCONF, + .line = 1, + }, + .type = PORT_SCIF, + .irqs = SH7770_SCIF1_IRQS, + .init_pins = sci_init_pins_scif, + }, + { + .port = { + .membase = (void *)0xff925000, + .mapbase = 0xff925000, + .iotype = UPIO_MEM, + .irq = 63, + .ops = &sci_uart_ops, + .flags = UPF_BOOT_AUTOCONF, + .line = 2, + }, + .type = PORT_SCIF, + .irqs = SH7770_SCIF2_IRQS, + .init_pins = sci_init_pins_scif, + }, +#elif defined(CONFIG_CPU_SUBTYPE_SH7780) + { + .port = { + .membase = (void *)0xffe00000, + .mapbase = 0xffe00000, + .iotype = UPIO_MEM, + .irq = 43, + .ops = &sci_uart_ops, + .flags = UPF_BOOT_AUTOCONF, + .line = 0, + }, + .type = PORT_SCIF, + .irqs = SH7780_SCIF0_IRQS, + .init_pins = sci_init_pins_scif, + }, + { + .port = { + .membase = (void *)0xffe10000, + .mapbase = 0xffe10000, + .iotype = UPIO_MEM, + .irq = 79, + .ops = &sci_uart_ops, + .flags = UPF_BOOT_AUTOCONF, + .line = 1, + }, + .type = PORT_SCIF, + .irqs = SH7780_SCIF1_IRQS, + .init_pins = sci_init_pins_scif, + }, #else #error "CPU subtype not defined" #endif @@ -1480,9 +1560,6 @@ static int __init serial_console_setup(struct console *co, char *options) int flow = 'n'; int ret; - if (co->index >= SCI_NPORTS) - co->index = 0; - serial_console_port = &sci_ports[co->index]; port = &serial_console_port->port; port->type = serial_console_port->type; @@ -1496,14 +1573,21 @@ static int __init serial_console_setup(struct console *co, char *options) * We need to set the initial uartclk here, since otherwise it will * only ever be setup at sci_init() time. */ -#if !defined(__H8300H__) && !defined(__H8300S__) - port->uartclk = current_cpu_data.module_clock * 16; -#else +#if defined(__H8300H__) || defined(__H8300S__) port->uartclk = CONFIG_CPU_CLOCK; -#endif + #if defined(__H8300S__) h8300_sci_enable(port, sci_enable); #endif +#elif defined(CONFIG_SUPERH64) + port->uartclk = current_cpu_info.module_clock * 16; +#else + { + struct clk *clk = clk_get("module_clk"); + port->uartclk = clk_get_rate(clk) * 16; + clk_put(clk); + } +#endif if (options) uart_parse_options(options, &baud, &parity, &bits, &flow); @@ -1566,7 +1650,7 @@ int __init kgdb_console_setup(struct console *co, char *options) int parity = 'n'; int flow = 'n'; - if (co->index >= SCI_NPORTS || co->index != kgdb_portnum) + if (co->index != kgdb_portnum) co->index = kgdb_portnum; if (options) @@ -1606,7 +1690,7 @@ console_initcall(kgdb_console_init); #elif defined(CONFIG_SERIAL_SH_SCI_CONSOLE) #define SCI_CONSOLE &serial_console #else -#define SCI_CONSOLE 0 +#define SCI_CONSOLE 0 #endif static char banner[] __initdata = @@ -1621,7 +1705,6 @@ static struct uart_driver sci_uart_driver = { .dev_name = "ttySC", .major = SCI_MAJOR, .minor = SCI_MINOR_START, - .nr = SCI_NPORTS, .cons = SCI_CONSOLE, }; @@ -1631,15 +1714,21 @@ static int __init sci_init(void) printk("%s", banner); + sci_uart_driver.nr = ARRAY_SIZE(sci_ports); + ret = uart_register_driver(&sci_uart_driver); if (ret == 0) { for (chan = 0; chan < SCI_NPORTS; chan++) { struct sci_port *sciport = &sci_ports[chan]; -#if !defined(__H8300H__) && !defined(__H8300S__) - sciport->port.uartclk = (current_cpu_data.module_clock * 16); -#else +#if defined(__H8300H__) || defined(__H8300S__) sciport->port.uartclk = CONFIG_CPU_CLOCK; +#elif defined(CONFIG_SUPERH64) + sciport->port.uartclk = current_cpu_info.module_clock * 16; +#else + struct clk *clk = clk_get("module_clk"); + sciport->port.uartclk = clk_get_rate(clk) * 16; + clk_put(clk); #endif uart_add_one_port(&sci_uart_driver, &sciport->port); sciport->break_timer.data = (unsigned long)sciport; diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h index 2892169eff0..1f14bb4382f 100644 --- a/drivers/serial/sh-sci.h +++ b/drivers/serial/sh-sci.h @@ -46,14 +46,17 @@ #define H8S_SCI_IRQS1 {92, 93, 94, 0 } #define H8S_SCI_IRQS2 {96, 97, 98, 0 } #define SH5_SCIF_IRQS {39, 40, 42, 0 } +#define SH7770_SCIF0_IRQS {61, 61, 61, 61 } +#define SH7770_SCIF1_IRQS {62, 62, 62, 62 } +#define SH7770_SCIF2_IRQS {63, 63, 63, 63 } +#define SH7780_SCIF0_IRQS {40, 41, 43, 42 } +#define SH7780_SCIF1_IRQS {76, 77, 79, 78 } #if defined(CONFIG_CPU_SUBTYPE_SH7708) -# define SCI_NPORTS 1 # define SCSPTR 0xffffff7c /* 8 bit */ # define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ # define SCI_ONLY #elif defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) -# define SCI_NPORTS 3 # define SCPCR 0xA4000116 /* 16 bit SCI and SCIF */ # define SCPDR 0xA4000136 /* 8 bit SCI and SCIF */ # define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ @@ -61,9 +64,8 @@ #elif defined(CONFIG_CPU_SUBTYPE_SH7705) # define SCIF0 0xA4400000 # define SCIF2 0xA4410000 -# define SCSMR_Ir 0xA44A0000 -# define IRDA_SCIF SCIF0 -# define SCI_NPORTS 2 +# define SCSMR_Ir 0xA44A0000 +# define IRDA_SCIF SCIF0 # define SCPCR 0xA4000116 # define SCPDR 0xA4000136 @@ -74,14 +76,11 @@ # define SCSCR_INIT(port) (port->mapbase == SCIF2) ? 0xF3 : 0xF0 # define SCIF_ONLY #elif defined(CONFIG_SH_RTS7751R2D) -# define SCI_NPORTS 1 -# define SCSPTR1 0xffe0001c /* 8 bit SCI */ # define SCSPTR2 0xFFE80020 /* 16 bit SCIF */ # define SCIF_ORER 0x0001 /* overrun error bit */ # define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ # define SCIF_ONLY #elif defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7751) -# define SCI_NPORTS 2 # define SCSPTR1 0xffe0001c /* 8 bit SCI */ # define SCSPTR2 0xFFE80020 /* 16 bit SCIF */ # define SCIF_ORER 0x0001 /* overrun error bit */ @@ -90,34 +89,29 @@ 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ ) # define SCI_AND_SCIF #elif defined(CONFIG_CPU_SUBTYPE_SH7760) -# define SCI_NPORTS 3 -# define SCSPTR0 0xfe600000 /* 16 bit SCIF */ -# define SCSPTR1 0xfe610000 /* 16 bit SCIF */ -# define SCSPTR2 0xfe620000 /* 16 bit SCIF */ +# define SCSPTR0 0xfe600024 /* 16 bit SCIF */ +# define SCSPTR1 0xfe610024 /* 16 bit SCIF */ +# define SCSPTR2 0xfe620024 /* 16 bit SCIF */ # define SCIF_ORER 0x0001 /* overrun error bit */ # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ # define SCIF_ONLY #elif defined(CONFIG_CPU_SUBTYPE_SH7300) -# define SCI_NPORTS 1 # define SCPCR 0xA4050116 /* 16 bit SCIF */ # define SCPDR 0xA4050136 /* 16 bit SCIF */ # define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */ # define SCIF_ONLY #elif defined(CONFIG_CPU_SUBTYPE_SH73180) -# define SCI_NPORTS 1 # define SCPDR 0xA4050138 /* 16 bit SCIF */ # define SCSPTR2 SCPDR # define SCIF_ORER 0x0001 /* overrun error bit */ # define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1 */ # define SCIF_ONLY #elif defined(CONFIG_CPU_SUBTYPE_SH4_202) -# define SCI_NPORTS 1 # define SCSPTR2 0xffe80020 /* 16 bit SCIF */ # define SCIF_ORER 0x0001 /* overrun error bit */ # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ # define SCIF_ONLY #elif defined(CONFIG_CPU_SUBTYPE_ST40STB1) -# define SCI_NPORTS 2 # define SCSPTR1 0xffe00020 /* 16 bit SCIF */ # define SCSPTR2 0xffe80020 /* 16 bit SCIF */ # define SCIF_ORER 0x0001 /* overrun error bit */ @@ -129,26 +123,32 @@ # define SCIF_ADDR_SH5 PHYS_PERIPHERAL_BLOCK+SCIF_BASE_ADDR # define SCIF_PTR2_OFFS 0x0000020 # define SCIF_LSR2_OFFS 0x0000024 -# define SCI_NPORTS 1 -# define SCI_INIT { \ - { {}, PORT_SCIF, 0, \ - SH5_SCIF_IRQS, sci_init_pins_scif } \ -} # define SCSPTR2 ((port->mapbase)+SCIF_PTR2_OFFS) /* 16 bit SCIF */ # define SCLSR2 ((port->mapbase)+SCIF_LSR2_OFFS) /* 16 bit SCIF */ # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0, TE=1,RE=1,REIE=1 */ # define SCIF_ONLY #elif defined(CONFIG_H83007) || defined(CONFIG_H83068) -# define SCI_NPORTS 3 # define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ # define SCI_ONLY # define H8300_SCI_DR(ch) *(volatile char *)(P1DR + h8300_sci_pins[ch].port) #elif defined(CONFIG_H8S2678) -# define SCI_NPORTS 3 # define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ # define SCI_ONLY # define H8300_SCI_DR(ch) *(volatile char *)(P1DR + h8300_sci_pins[ch].port) +#elif defined(CONFIG_CPU_SUBTYPE_SH7770) +# define SCSPTR0 0xff923020 /* 16 bit SCIF */ +# define SCSPTR1 0xff924020 /* 16 bit SCIF */ +# define SCSPTR2 0xff925020 /* 16 bit SCIF */ +# define SCIF_ORER 0x0001 /* overrun error bit */ +# define SCSCR_INIT(port) 0x3c /* TIE=0,RIE=0,TE=1,RE=1,REIE=1,cke=2 */ +# define SCIF_ONLY +#elif defined(CONFIG_CPU_SUBTYPE_SH7780) +# define SCSPTR0 0xffe00024 /* 16 bit SCIF */ +# define SCSPTR1 0xffe10024 /* 16 bit SCIF */ +# define SCIF_OPER 0x0001 /* Overrun error bit */ +# define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ +# define SCIF_ONLY #else # error CPU subtype not defined #endif @@ -158,7 +158,7 @@ #define SCI_CTRL_FLAGS_RIE 0x40 /* all */ #define SCI_CTRL_FLAGS_TE 0x20 /* all */ #define SCI_CTRL_FLAGS_RE 0x10 /* all */ -#if defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7751) +#if defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7751) || defined(CONFIG_CPU_SUBTYPE_SH7780) #define SCI_CTRL_FLAGS_REIE 0x08 /* 7750 SCIF */ #else #define SCI_CTRL_FLAGS_REIE 0 @@ -213,7 +213,7 @@ # define SCxSR_RDxF_CLEAR(port) 0xbc # define SCxSR_ERROR_CLEAR(port) 0xc4 # define SCxSR_TDxE_CLEAR(port) 0x78 -# define SCxSR_BREAK_CLEAR(port) 0xc4 +# define SCxSR_BREAK_CLEAR(port) 0xc4 #elif defined(SCIF_ONLY) # define SCxSR_TEND(port) SCIF_TEND # define SCxSR_ERRORS(port) SCIF_ERRORS @@ -237,7 +237,7 @@ # define SCxSR_RDxF_CLEAR(port) 0x00fc # define SCxSR_ERROR_CLEAR(port) 0x0073 # define SCxSR_TDxE_CLEAR(port) 0x00df -# define SCxSR_BREAK_CLEAR(port) 0x00e3 +# define SCxSR_BREAK_CLEAR(port) 0x00e3 #endif #else # define SCxSR_TEND(port) (((port)->type == PORT_SCI) ? SCI_TEND : SCIF_TEND) @@ -285,14 +285,14 @@ struct sci_port { #define SCI_IN(size, offset) \ unsigned int addr = port->mapbase + (offset); \ - if ((size) == 8) { \ + if ((size) == 8) { \ return ctrl_inb(addr); \ - } else { \ + } else { \ return ctrl_inw(addr); \ } #define SCI_OUT(size, offset, value) \ unsigned int addr = port->mapbase + (offset); \ - if ((size) == 8) { \ + if ((size) == 8) { \ ctrl_outb(value, addr); \ } else { \ ctrl_outw(value, addr); \ @@ -301,10 +301,10 @@ struct sci_port { #define CPU_SCIx_FNS(name, sci_offset, sci_size, scif_offset, scif_size)\ static inline unsigned int sci_##name##_in(struct uart_port *port) \ { \ - if (port->type == PORT_SCI) { \ + if (port->type == PORT_SCI) { \ SCI_IN(sci_size, sci_offset) \ } else { \ - SCI_IN(scif_size, scif_offset); \ + SCI_IN(scif_size, scif_offset); \ } \ } \ static inline void sci_##name##_out(struct uart_port *port, unsigned int value) \ @@ -319,7 +319,7 @@ struct sci_port { #define CPU_SCIF_FNS(name, scif_offset, scif_size) \ static inline unsigned int sci_##name##_in(struct uart_port *port) \ { \ - SCI_IN(scif_size, scif_offset); \ + SCI_IN(scif_size, scif_offset); \ } \ static inline void sci_##name##_out(struct uart_port *port, unsigned int value) \ { \ @@ -329,7 +329,7 @@ struct sci_port { #define CPU_SCI_FNS(name, sci_offset, sci_size) \ static inline unsigned int sci_##name##_in(struct uart_port* port) \ { \ - SCI_IN(sci_size, sci_offset); \ + SCI_IN(sci_size, sci_offset); \ } \ static inline void sci_##name##_out(struct uart_port* port, unsigned int value) \ { \ @@ -385,10 +385,17 @@ SCIx_FNS(SCxTDR, 0x06, 8, 0x0c, 8, 0x06, 8, 0x0C, 8, 0x03, 8) SCIx_FNS(SCxSR, 0x08, 8, 0x10, 8, 0x08, 16, 0x10, 16, 0x04, 8) SCIx_FNS(SCxRDR, 0x0a, 8, 0x14, 8, 0x0A, 8, 0x14, 8, 0x05, 8) SCIF_FNS(SCFCR, 0x0c, 8, 0x18, 16) +#if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780) +SCIF_FNS(SCTFDR, 0x0e, 16, 0x1C, 16) +SCIF_FNS(SCRFDR, 0x0e, 16, 0x20, 16) +SCIF_FNS(SCSPTR, 0, 0, 0x24, 16) +SCIF_FNS(SCLSR, 0, 0, 0x28, 16) +#else SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16) SCIF_FNS(SCSPTR, 0, 0, 0x20, 16) SCIF_FNS(SCLSR, 0, 0, 0x24, 16) #endif +#endif #define sci_in(port, reg) sci_##reg##_in(port) #define sci_out(port, reg, value) sci_##reg##_out(port, value) @@ -518,6 +525,24 @@ static inline int sci_rxd_in(struct uart_port *port) int ch = (port->mapbase - SMR0) >> 3; return (H8300_SCI_DR(ch) & h8300_sci_pins[ch].rx) ? 1 : 0; } +#elif defined(CONFIG_CPU_SUBTYPE_SH7770) +static inline int sci_rxd_in(struct uart_port *port) +{ + if (port->mapbase == 0xff923000) + return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ + if (port->mapbase == 0xff924000) + return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ + if (port->mapbase == 0xff925000) + return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ +} +#elif defined(CONFIG_CPU_SUBTYPE_SH7780) +static inline int sci_rxd_in(struct uart_port *port) +{ + if (port->mapbase == 0xffe00000) + return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ + if (port->mapbase == 0xffe10000) + return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ +} #endif /* @@ -552,22 +577,15 @@ static inline int sci_rxd_in(struct uart_port *port) * -- Mitch Davis - 15 Jul 2000 */ -#define PCLK (current_cpu_data.module_clock) - -#if defined(CONFIG_CPU_SUBTYPE_SH7300) -#define SCBRR_VALUE(bps) ((PCLK+16*bps)/(16*bps)-1) +#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7780) +#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1) #elif defined(CONFIG_CPU_SUBTYPE_SH7705) -#define SCBRR_VALUE(bps) (((PCLK*2)+16*bps)/(32*bps)-1) -#elif !defined(__H8300H__) && !defined(__H8300S__) -#define SCBRR_VALUE(bps) ((PCLK+16*bps)/(32*bps)-1) -#else +#define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1) +#elif defined(__H8300H__) || defined(__H8300S__) #define SCBRR_VALUE(bps) (((CONFIG_CPU_CLOCK*1000/32)/bps)-1) +#elif defined(CONFIG_SUPERH64) +#define SCBRR_VALUE(bps) ((current_cpu_data.module_clock+16*bps)/(32*bps)-1) +#else /* Generic SH */ +#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1) #endif -#define BPS_2400 SCBRR_VALUE(2400) -#define BPS_4800 SCBRR_VALUE(4800) -#define BPS_9600 SCBRR_VALUE(9600) -#define BPS_19200 SCBRR_VALUE(19200) -#define BPS_38400 SCBRR_VALUE(38400) -#define BPS_57600 SCBRR_VALUE(57600) -#define BPS_115200 SCBRR_VALUE(115200) diff --git a/drivers/serial/sunsab.c b/drivers/serial/sunsab.c index 8bcaebcc0ad..85664228a0b 100644 --- a/drivers/serial/sunsab.c +++ b/drivers/serial/sunsab.c @@ -1036,7 +1036,7 @@ static void __init sab_attach_callback(struct linux_ebus_device *edev, void *arg up->port.irq = edev->irqs[0]; up->port.fifosize = SAB82532_XMIT_FIFO_SIZE; up->port.mapbase = (unsigned long)up->regs; - up->port.iotype = SERIAL_IO_MEM; + up->port.iotype = UPIO_MEM; writeb(SAB82532_IPC_IC_ACT_LOW, &up->regs->w.ipc); diff --git a/drivers/serial/sunsu.c b/drivers/serial/sunsu.c index 9a3665b34d9..30870456694 100644 --- a/drivers/serial/sunsu.c +++ b/drivers/serial/sunsu.c @@ -109,11 +109,11 @@ static _INLINE_ unsigned int serial_in(struct uart_sunsu_port *up, int offset) offset <<= up->port.regshift; switch (up->port.iotype) { - case SERIAL_IO_HUB6: + case UPIO_HUB6: outb(up->port.hub6 - 1 + offset, up->port.iobase); return inb(up->port.iobase + 1); - case SERIAL_IO_MEM: + case UPIO_MEM: return readb(up->port.membase + offset); default: @@ -139,12 +139,12 @@ serial_out(struct uart_sunsu_port *up, int offset, int value) offset <<= up->port.regshift; switch (up->port.iotype) { - case SERIAL_IO_HUB6: + case UPIO_HUB6: outb(up->port.hub6 - 1 + offset, up->port.iobase); outb(value, up->port.iobase + 1); break; - case SERIAL_IO_MEM: + case UPIO_MEM: writeb(value, up->port.membase + offset); break; @@ -669,7 +669,7 @@ static int sunsu_startup(struct uart_port *port) * if it is, then bail out, because there's likely no UART * here. */ - if (!(up->port.flags & ASYNC_BUGGY_UART) && + if (!(up->port.flags & UPF_BUGGY_UART) && (serial_inp(up, UART_LSR) == 0xff)) { printk("ttyS%d: LSR safety check engaged!\n", up->port.line); return -ENODEV; @@ -707,7 +707,7 @@ static int sunsu_startup(struct uart_port *port) up->ier = UART_IER_RLSI | UART_IER_RDI; serial_outp(up, UART_IER, up->ier); - if (up->port.flags & ASYNC_FOURPORT) { + if (up->port.flags & UPF_FOURPORT) { unsigned int icp; /* * Enable interrupts on the AST Fourport board @@ -740,7 +740,7 @@ static void sunsu_shutdown(struct uart_port *port) serial_outp(up, UART_IER, 0); spin_lock_irqsave(&up->port.lock, flags); - if (up->port.flags & ASYNC_FOURPORT) { + if (up->port.flags & UPF_FOURPORT) { /* reset interrupts on the AST Fourport board */ inb((up->port.iobase & 0xfe0) | 0x1f); up->port.mctrl |= TIOCM_OUT1; @@ -1052,7 +1052,7 @@ static void sunsu_autoconfig(struct uart_sunsu_port *up) return; up->type_probed = PORT_UNKNOWN; - up->port.iotype = SERIAL_IO_MEM; + up->port.iotype = UPIO_MEM; /* * First we look for Ebus-bases su's @@ -1132,7 +1132,7 @@ ebus_done: spin_lock_irqsave(&up->port.lock, flags); - if (!(up->port.flags & ASYNC_BUGGY_UART)) { + if (!(up->port.flags & UPF_BUGGY_UART)) { /* * Do a simple existence test first; if we fail this, there's * no point trying anything else. @@ -1170,7 +1170,7 @@ ebus_done: * manufacturer would be stupid enough to design a board * that conflicts with COM 1-4 --- we hope! */ - if (!(up->port.flags & ASYNC_SKIP_TEST)) { + if (!(up->port.flags & UPF_SKIP_TEST)) { serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A); status1 = serial_inp(up, UART_MSR) & 0xF0; serial_outp(up, UART_MCR, save_mcr); @@ -1371,7 +1371,7 @@ static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up) } while ((status & BOTH_EMPTY) != BOTH_EMPTY); /* Wait up to 1s for flow control if necessary */ - if (up->port.flags & ASYNC_CONS_FLOW) { + if (up->port.flags & UPF_CONS_FLOW) { tmout = 1000000; while (--tmout && ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0)) @@ -1513,7 +1513,7 @@ static int __init sunsu_serial_init(void) up->su_type == SU_PORT_KBD) continue; - up->port.flags |= ASYNC_BOOT_AUTOCONF; + up->port.flags |= UPF_BOOT_AUTOCONF; up->port.type = PORT_UNKNOWN; up->port.uartclk = (SU_BASE_BAUD * 16); diff --git a/drivers/serial/sunzilog.c b/drivers/serial/sunzilog.c index 3c72484adea..5cc4d4c2935 100644 --- a/drivers/serial/sunzilog.c +++ b/drivers/serial/sunzilog.c @@ -1487,7 +1487,7 @@ static void __init sunzilog_prepare(void) up[(chip * 2) + 1].port.membase = (void __iomem *)&rp->channelB; /* Channel A */ - up[(chip * 2) + 0].port.iotype = SERIAL_IO_MEM; + up[(chip * 2) + 0].port.iotype = UPIO_MEM; up[(chip * 2) + 0].port.irq = zilog_irq; up[(chip * 2) + 0].port.uartclk = ZS_CLOCK; up[(chip * 2) + 0].port.fifosize = 1; @@ -1498,7 +1498,7 @@ static void __init sunzilog_prepare(void) up[(chip * 2) + 0].flags |= SUNZILOG_FLAG_IS_CHANNEL_A; /* Channel B */ - up[(chip * 2) + 1].port.iotype = SERIAL_IO_MEM; + up[(chip * 2) + 1].port.iotype = UPIO_MEM; up[(chip * 2) + 1].port.irq = zilog_irq; up[(chip * 2) + 1].port.uartclk = ZS_CLOCK; up[(chip * 2) + 1].port.fifosize = 1; diff --git a/drivers/serial/v850e_uart.c b/drivers/serial/v850e_uart.c index 9378895a8d5..df705fda424 100644 --- a/drivers/serial/v850e_uart.c +++ b/drivers/serial/v850e_uart.c @@ -496,7 +496,7 @@ static int __init v850e_uart_init (void) port->ops = &v850e_uart_ops; port->line = chan; - port->iotype = SERIAL_IO_MEM; + port->iotype = UPIO_MEM; port->flags = UPF_BOOT_AUTOCONF; /* We actually use multiple IRQs, but the serial |