diff options
Diffstat (limited to 'drivers/serial')
| -rw-r--r-- | drivers/serial/8250_pci.c | 6 | ||||
| -rw-r--r-- | drivers/serial/Kconfig | 2 | ||||
| -rw-r--r-- | drivers/serial/jsm/jsm_driver.c | 2 | ||||
| -rw-r--r-- | drivers/serial/mcf.c | 11 | ||||
| -rw-r--r-- | drivers/serial/sh-sci.h | 5 |
5 files changed, 23 insertions, 3 deletions
diff --git a/drivers/serial/8250_pci.c b/drivers/serial/8250_pci.c index 2a3671233b1..536d8e510f6 100644 --- a/drivers/serial/8250_pci.c +++ b/drivers/serial/8250_pci.c @@ -806,6 +806,8 @@ pci_default_setup(struct serial_private *priv, #define PCI_SUBDEVICE_ID_OCTPRO422 0x0208 #define PCI_SUBDEVICE_ID_POCTAL232 0x0308 #define PCI_SUBDEVICE_ID_POCTAL422 0x0408 +#define PCI_VENDOR_ID_ADVANTECH 0x13fe +#define PCI_DEVICE_ID_ADVANTECH_PCI3620 0x3620 /* Unknown vendors/cards - this should not be in linux/pci_ids.h */ #define PCI_SUBDEVICE_ID_UNKNOWN_0x1584 0x1584 @@ -2152,6 +2154,10 @@ static int pciserial_resume_one(struct pci_dev *dev) #endif static struct pci_device_id serial_pci_tbl[] = { + /* Advantech use PCI_DEVICE_ID_ADVANTECH_PCI3620 (0x3620) as 'PCI_SUBVENDOR_ID' */ + { PCI_VENDOR_ID_ADVANTECH, PCI_DEVICE_ID_ADVANTECH_PCI3620, + PCI_DEVICE_ID_ADVANTECH_PCI3620, 0x0001, 0, 0, + pbn_b2_8_921600 }, { PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V960, PCI_SUBVENDOR_ID_CONNECT_TECH, PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_232, 0, 0, diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 3e525e38a5d..7d7f576da20 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -982,7 +982,7 @@ config SERIAL_SH_SCI_CONSOLE config SERIAL_PNX8XXX bool "Enable PNX8XXX SoCs' UART Support" - depends on MIPS && SOC_PNX8550 + depends on MIPS && (SOC_PNX8550 || SOC_PNX833X) select SERIAL_CORE help If you have a MIPS-based Philips SoC such as PNX8550 or PNX8330 diff --git a/drivers/serial/jsm/jsm_driver.c b/drivers/serial/jsm/jsm_driver.c index 338cf8a08b4..92187e28608 100644 --- a/drivers/serial/jsm/jsm_driver.c +++ b/drivers/serial/jsm/jsm_driver.c @@ -180,7 +180,7 @@ static int jsm_probe_one(struct pci_dev *pdev, const struct pci_device_id *ent) return rc; } -static void jsm_remove_one(struct pci_dev *pdev) +static void __devexit jsm_remove_one(struct pci_dev *pdev) { struct jsm_board *brd = pci_get_drvdata(pdev); int i = 0; diff --git a/drivers/serial/mcf.c b/drivers/serial/mcf.c index b2001c5b145..56841fe5f48 100644 --- a/drivers/serial/mcf.c +++ b/drivers/serial/mcf.c @@ -212,10 +212,18 @@ static void mcf_set_termios(struct uart_port *port, struct ktermios *termios, { unsigned long flags; unsigned int baud, baudclk; +#if defined(CONFIG_M5272) + unsigned int baudfr; +#endif unsigned char mr1, mr2; baud = uart_get_baud_rate(port, termios, old, 0, 230400); +#if defined(CONFIG_M5272) + baudclk = (MCF_BUSCLK / baud) / 32; + baudfr = (((MCF_BUSCLK / baud) + 1) / 2) % 16; +#else baudclk = ((MCF_BUSCLK / baud) + 16) / 32; +#endif mr1 = MCFUART_MR1_RXIRQRDY | MCFUART_MR1_RXERRCHAR; mr2 = 0; @@ -262,6 +270,9 @@ static void mcf_set_termios(struct uart_port *port, struct ktermios *termios, writeb(mr2, port->membase + MCFUART_UMR); writeb((baudclk & 0xff00) >> 8, port->membase + MCFUART_UBG1); writeb((baudclk & 0xff), port->membase + MCFUART_UBG2); +#if defined(CONFIG_M5272) + writeb((baudfr & 0x0f), port->membase + MCFUART_UFPD); +#endif writeb(MCFUART_UCSR_RXCLKTIMER | MCFUART_UCSR_TXCLKTIMER, port->membase + MCFUART_UCSR); writeb(MCFUART_UCR_RXENABLE | MCFUART_UCR_TXENABLE, diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h index 38c600c0dbb..3599828b976 100644 --- a/drivers/serial/sh-sci.h +++ b/drivers/serial/sh-sci.h @@ -32,7 +32,9 @@ #elif defined(CONFIG_CPU_SUBTYPE_SH7720) || \ defined(CONFIG_CPU_SUBTYPE_SH7721) # define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */ -#define SCIF_ORER 0x0200 /* overrun error bit */ +# define PORT_PTCR 0xA405011EUL +# define PORT_PVCR 0xA4050122UL +# define SCIF_ORER 0x0200 /* overrun error bit */ #elif defined(CONFIG_SH_RTS7751R2D) # define SCSPTR1 0xFFE0001C /* 8 bit SCIF */ # define SCSPTR2 0xFFE80020 /* 16 bit SCIF */ @@ -393,6 +395,7 @@ SCIx_FNS(SCSCR, 0x08, 16, 0x08, 16) SCIx_FNS(SCxTDR, 0x20, 8, 0x0c, 8) SCIx_FNS(SCxSR, 0x14, 16, 0x10, 16) SCIx_FNS(SCxRDR, 0x24, 8, 0x14, 8) +SCIx_FNS(SCSPTR, 0, 0, 0, 0) SCIF_FNS(SCTDSR, 0x0c, 8) SCIF_FNS(SCFER, 0x10, 16) SCIF_FNS(SCFCR, 0x18, 16) |