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-rw-r--r--include/asm-mips/mach-db1x00/db1200.h18
-rw-r--r--include/asm-mips/mach-pb1x00/pb1200.h18
2 files changed, 18 insertions, 18 deletions
diff --git a/include/asm-mips/mach-db1x00/db1200.h b/include/asm-mips/mach-db1x00/db1200.h
index d2e28e64932..eedd048a726 100644
--- a/include/asm-mips/mach-db1x00/db1200.h
+++ b/include/asm-mips/mach-db1x00/db1200.h
@@ -169,15 +169,15 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
#define BCSR_INT_SD0INSERT 0x1000
#define BCSR_INT_SD0EJECT 0x2000
-#define AU1XXX_SMC91111_PHYS_ADDR (0x19000300)
-#define AU1XXX_SMC91111_IRQ DB1200_ETH_INT
-
-#define AU1XXX_ATA_PHYS_ADDR (0x18800000)
-#define AU1XXX_ATA_REG_OFFSET (5)
-#define AU1XXX_ATA_PHYS_LEN (16 << AU1XXX_ATA_REG_OFFSET)
-#define AU1XXX_ATA_INT DB1200_IDE_INT
-#define AU1XXX_ATA_DDMA_REQ DSCR_CMD0_DMA_REQ1;
-#define AU1XXX_ATA_RQSIZE 128
+#define SMC91C111_PHYS_ADDR 0x19000300
+#define SMC91C111_INT DB1200_ETH_INT
+
+#define IDE_PHYS_ADDR 0x18800000
+#define IDE_REG_SHIFT 5
+#define IDE_PHYS_LEN (16 << IDE_REG_SHIFT)
+#define IDE_INT DB1200_IDE_INT
+#define IDE_DDMA_REQ DSCR_CMD0_DMA_REQ1
+#define IDE_RQSIZE 128
#define NAND_PHYS_ADDR 0x20000000
diff --git a/include/asm-mips/mach-pb1x00/pb1200.h b/include/asm-mips/mach-pb1x00/pb1200.h
index edaa489b58f..e2c6bcac3b4 100644
--- a/include/asm-mips/mach-pb1x00/pb1200.h
+++ b/include/asm-mips/mach-pb1x00/pb1200.h
@@ -182,15 +182,15 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
#define SET_VCC_VPP(VCC, VPP, SLOT)\
((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8))
-#define AU1XXX_SMC91111_PHYS_ADDR (0x0D000300)
-#define AU1XXX_SMC91111_IRQ PB1200_ETH_INT
-
-#define AU1XXX_ATA_PHYS_ADDR (0x0C800000)
-#define AU1XXX_ATA_REG_OFFSET (5)
-#define AU1XXX_ATA_PHYS_LEN (16 << AU1XXX_ATA_REG_OFFSET)
-#define AU1XXX_ATA_INT PB1200_IDE_INT
-#define AU1XXX_ATA_DDMA_REQ DSCR_CMD0_DMA_REQ1;
-#define AU1XXX_ATA_RQSIZE 128
+#define SMC91C111_PHYS_ADDR 0x0D000300
+#define SMC91C111_INT PB1200_ETH_INT
+
+#define IDE_PHYS_ADDR 0x0C800000
+#define IDE_REG_SHIFT 5
+#define IDE_PHYS_LEN (16 << IDE_REG_SHIFT)
+#define IDE_INT PB1200_IDE_INT
+#define IDE_DDMA_REQ DSCR_CMD0_DMA_REQ1
+#define IDE_RQSIZE 128
#define NAND_PHYS_ADDR 0x1C000000