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-rw-r--r--include/media/saa7115.h19
-rw-r--r--include/media/v4l2-common.h12
2 files changed, 21 insertions, 10 deletions
diff --git a/include/media/saa7115.h b/include/media/saa7115.h
index f677dfb9d37..bab21271959 100644
--- a/include/media/saa7115.h
+++ b/include/media/saa7115.h
@@ -1,5 +1,5 @@
/*
- saa7115.h - definition for saa7113/4/5 inputs and frequency flags
+ saa7115.h - definition for saa7111/3/4/5 inputs and frequency flags
Copyright (C) 2006 Hans Verkuil (hverkuil@xs4all.nl)
@@ -21,13 +21,13 @@
#ifndef _SAA7115_H_
#define _SAA7115_H_
-/* SAA7113/4/5 HW inputs */
+/* SAA7111/3/4/5 HW inputs */
#define SAA7115_COMPOSITE0 0
#define SAA7115_COMPOSITE1 1
#define SAA7115_COMPOSITE2 2
#define SAA7115_COMPOSITE3 3
-#define SAA7115_COMPOSITE4 4 /* not available for the saa7113 */
-#define SAA7115_COMPOSITE5 5 /* not available for the saa7113 */
+#define SAA7115_COMPOSITE4 4 /* not available for the saa7111/3 */
+#define SAA7115_COMPOSITE5 5 /* not available for the saa7111/3 */
#define SAA7115_SVIDEO0 6
#define SAA7115_SVIDEO1 7
#define SAA7115_SVIDEO2 8
@@ -42,8 +42,15 @@
#define SAA7115_FREQ_FL_CGCDIV (1 << 1) /* SA 3A[6], CGCDIV, SAA7115 only */
#define SAA7115_FREQ_FL_APLL (1 << 2) /* SA 3A[3], APLL, SAA7114/5 only */
-#define SAA7115_IPORT_ON 1
-#define SAA7115_IPORT_OFF 0
+#define SAA7115_IPORT_ON 1
+#define SAA7115_IPORT_OFF 0
+
+/* SAA7111 specific output flags */
+#define SAA7111_VBI_BYPASS 2
+#define SAA7111_FMT_YUV422 0x00
+#define SAA7111_FMT_RGB 0x40
+#define SAA7111_FMT_CCIR 0x80
+#define SAA7111_FMT_YUV411 0xc0
#endif
diff --git a/include/media/v4l2-common.h b/include/media/v4l2-common.h
index 0c195ccd45d..2f8719abf5c 100644
--- a/include/media/v4l2-common.h
+++ b/include/media/v4l2-common.h
@@ -225,18 +225,22 @@ struct v4l2_crystal_freq {
An extra flags field allows device specific configuration regarding
clock frequency dividers, etc. If not used, then set flags to 0.
If the frequency is not supported, then -EINVAL is returned. */
-#define VIDIOC_INT_S_CRYSTAL_FREQ _IOW ('d', 113, struct v4l2_crystal_freq)
+#define VIDIOC_INT_S_CRYSTAL_FREQ _IOW('d', 113, struct v4l2_crystal_freq)
/* Initialize the sensor registors to some sort of reasonable
default values. */
-#define VIDIOC_INT_INIT _IOW ('d', 114, u32)
+#define VIDIOC_INT_INIT _IOW('d', 114, u32)
/* Set v4l2_std_id for video OUTPUT devices. This is ignored by
video input devices. */
-#define VIDIOC_INT_S_STD_OUTPUT _IOW ('d', 115, v4l2_std_id)
+#define VIDIOC_INT_S_STD_OUTPUT _IOW('d', 115, v4l2_std_id)
/* Get v4l2_std_id for video OUTPUT devices. This is ignored by
video input devices. */
-#define VIDIOC_INT_G_STD_OUTPUT _IOW ('d', 116, v4l2_std_id)
+#define VIDIOC_INT_G_STD_OUTPUT _IOW('d', 116, v4l2_std_id)
+
+/* Set GPIO pins. Very simple right now, might need to be extended with
+ a v4l2_gpio struct if a direction is also needed. */
+#define VIDIOC_INT_S_GPIO _IOW('d', 117, u32)
#endif /* V4L2_COMMON_H_ */