diff options
Diffstat (limited to 'include/video')
| -rw-r--r-- | include/video/cyblafb.h | 171 | ||||
| -rw-r--r-- | include/video/pmag-ba-fb.h | 41 | ||||
| -rw-r--r-- | include/video/pmagb-b-fb.h | 74 | ||||
| -rw-r--r-- | include/video/sisfb.h | 188 | ||||
| -rw-r--r-- | include/video/w100fb.h | 138 |
5 files changed, 483 insertions, 129 deletions
diff --git a/include/video/cyblafb.h b/include/video/cyblafb.h new file mode 100644 index 00000000000..a9948232b13 --- /dev/null +++ b/include/video/cyblafb.h @@ -0,0 +1,171 @@ + +#ifndef CYBLAFB_DEBUG +#define CYBLAFB_DEBUG 0 +#endif + +#if CYBLAFB_DEBUG +#define debug(f,a...) printk("%s:" f, __FUNCTION__ , ## a); +#else +#define debug(f,a...) +#endif + +#define output(f, a...) printk("cyblafb: " f, ## a) + +#define Kb (1024) +#define Mb (Kb*Kb) + +/* PCI IDS of supported cards temporarily here */ + +#define CYBERBLADEi1 0x8500 + +/* these defines are for 'lcd' variable */ +#define LCD_STRETCH 0 +#define LCD_CENTER 1 +#define LCD_BIOS 2 + +/* display types */ +#define DISPLAY_CRT 0 +#define DISPLAY_FP 1 + +#define ROP_S 0xCC + +#define point(x,y) ((y)<<16|(x)) + +// +// Attribute Regs, ARxx, 3c0/3c1 +// +#define AR00 0x00 +#define AR01 0x01 +#define AR02 0x02 +#define AR03 0x03 +#define AR04 0x04 +#define AR05 0x05 +#define AR06 0x06 +#define AR07 0x07 +#define AR08 0x08 +#define AR09 0x09 +#define AR0A 0x0A +#define AR0B 0x0B +#define AR0C 0x0C +#define AR0D 0x0D +#define AR0E 0x0E +#define AR0F 0x0F +#define AR10 0x10 +#define AR12 0x12 +#define AR13 0x13 + +// +// Sequencer Regs, SRxx, 3c4/3c5 +// +#define SR00 0x00 +#define SR01 0x01 +#define SR02 0x02 +#define SR03 0x03 +#define SR04 0x04 +#define SR0D 0x0D +#define SR0E 0x0E +#define SR11 0x11 +#define SR18 0x18 +#define SR19 0x19 + +// +// +// +#define CR00 0x00 +#define CR01 0x01 +#define CR02 0x02 +#define CR03 0x03 +#define CR04 0x04 +#define CR05 0x05 +#define CR06 0x06 +#define CR07 0x07 +#define CR08 0x08 +#define CR09 0x09 +#define CR0A 0x0A +#define CR0B 0x0B +#define CR0C 0x0C +#define CR0D 0x0D +#define CR0E 0x0E +#define CR0F 0x0F +#define CR10 0x10 +#define CR11 0x11 +#define CR12 0x12 +#define CR13 0x13 +#define CR14 0x14 +#define CR15 0x15 +#define CR16 0x16 +#define CR17 0x17 +#define CR18 0x18 +#define CR19 0x19 +#define CR1A 0x1A +#define CR1B 0x1B +#define CR1C 0x1C +#define CR1D 0x1D +#define CR1E 0x1E +#define CR1F 0x1F +#define CR20 0x20 +#define CR21 0x21 +#define CR27 0x27 +#define CR29 0x29 +#define CR2A 0x2A +#define CR2B 0x2B +#define CR2D 0x2D +#define CR2F 0x2F +#define CR36 0x36 +#define CR38 0x38 +#define CR39 0x39 +#define CR3A 0x3A +#define CR55 0x55 +#define CR56 0x56 +#define CR57 0x57 +#define CR58 0x58 + +// +// +// + +#define GR00 0x01 +#define GR01 0x01 +#define GR02 0x02 +#define GR03 0x03 +#define GR04 0x04 +#define GR05 0x05 +#define GR06 0x06 +#define GR07 0x07 +#define GR08 0x08 +#define GR0F 0x0F +#define GR20 0x20 +#define GR23 0x23 +#define GR2F 0x2F +#define GR30 0x30 +#define GR31 0x31 +#define GR33 0x33 +#define GR52 0x52 +#define GR53 0x53 +#define GR5D 0x5d + + +// +// Graphics Engine +// +#define GEBase 0x2100 // could be mapped elsewhere if we like it +#define GE00 (GEBase+0x00) // source 1, p 111 +#define GE04 (GEBase+0x04) // source 2, p 111 +#define GE08 (GEBase+0x08) // destination 1, p 111 +#define GE0C (GEBase+0x0C) // destination 2, p 112 +#define GE20 (GEBase+0x20) // engine status, p 113 +#define GE24 (GEBase+0x24) // reset all GE pointers +#define GE44 (GEBase+0x44) // command register, p 126 +#define GE48 (GEBase+0x48) // raster operation, p 127 +#define GE60 (GEBase+0x60) // foreground color, p 128 +#define GE64 (GEBase+0x64) // background color, p 128 +#define GE6C (GEBase+0x6C) // Pattern and Style, p 129, ok +#define GE9C (GEBase+0x9C) // pixel engine data port, p 125 +#define GEB8 (GEBase+0xB8) // Destination Stride / Buffer Base 0, p 133 +#define GEBC (GEBase+0xBC) // Destination Stride / Buffer Base 1, p 133 +#define GEC0 (GEBase+0xC0) // Destination Stride / Buffer Base 2, p 133 +#define GEC4 (GEBase+0xC4) // Destination Stride / Buffer Base 3, p 133 +#define GEC8 (GEBase+0xC8) // Source Stride / Buffer Base 0, p 133 +#define GECC (GEBase+0xCC) // Source Stride / Buffer Base 1, p 133 +#define GED0 (GEBase+0xD0) // Source Stride / Buffer Base 2, p 133 +#define GED4 (GEBase+0xD4) // Source Stride / Buffer Base 3, p 133 diff --git a/include/video/pmag-ba-fb.h b/include/video/pmag-ba-fb.h index cebef073b9a..fceb6c0f658 100644 --- a/include/video/pmag-ba-fb.h +++ b/include/video/pmag-ba-fb.h @@ -1,24 +1,27 @@ /* - * linux/drivers/video/pmag-ba-fb.h + * linux/include/video/pmag-ba-fb.h * - * TurboChannel PMAG-BA framebuffer card support, - * Copyright (C) 1999,2000,2001 by - * Michael Engel <engel@unix-ag.org>, - * Karsten Merker <merker@linuxtag.org> - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - */ - -/* - * Bt459 RAM DAC register base offset (rel. to TC slot base address) + * TURBOchannel PMAG-BA Color Frame Buffer (CFB) card support, + * Copyright (C) 1999, 2000, 2001 by + * Michael Engel <engel@unix-ag.org>, + * Karsten Merker <merker@linuxtag.org> + * Copyright (c) 2005 Maciej W. Rozycki + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. */ -#define PMAG_BA_BT459_OFFSET 0x00200000 - -/* - * Begin of PMAG-BA framebuffer memory relative to TC slot address, - * resolution is 1024x864x8 - */ +/* IOmem resource offsets. */ +#define PMAG_BA_FBMEM 0x000000 /* frame buffer */ +#define PMAG_BA_BT459 0x200000 /* Bt459 RAMDAC */ +#define PMAG_BA_IRQ 0x300000 /* IRQ acknowledge */ +#define PMAG_BA_ROM 0x380000 /* REX option ROM */ +#define PMAG_BA_BT438 0x380000 /* Bt438 clock chip reset */ +#define PMAG_BA_SIZE 0x400000 /* address space size */ -#define PMAG_BA_ONBOARD_FBMEM_OFFSET 0x00000000 +/* Bt459 register offsets, byte-wide registers. */ +#define BT459_ADDR_LO 0x0 /* address low */ +#define BT459_ADDR_HI 0x4 /* address high */ +#define BT459_DATA 0x8 /* data window register */ +#define BT459_CMAP 0xc /* color map window register */ diff --git a/include/video/pmagb-b-fb.h b/include/video/pmagb-b-fb.h index 87b81a55513..7539b9087a8 100644 --- a/include/video/pmagb-b-fb.h +++ b/include/video/pmagb-b-fb.h @@ -1,32 +1,58 @@ /* - * linux/drivers/video/pmagb-b-fb.h + * linux/include/video/pmagb-b-fb.h * - * TurboChannel PMAGB-B framebuffer card support, - * Copyright (C) 1999, 2000, 2001 by - * Michael Engel <engel@unix-ag.org> and - * Karsten Merker <merker@linuxtag.org> - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. + * TURBOchannel PMAGB-B Smart Frame Buffer (SFB) card support, + * Copyright (C) 1999, 2000, 2001 by + * Michael Engel <engel@unix-ag.org> and + * Karsten Merker <merker@linuxtag.org> + * Copyright (c) 2005 Maciej W. Rozycki + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. */ +/* IOmem resource offsets. */ +#define PMAGB_B_ROM 0x000000 /* REX option ROM */ +#define PMAGB_B_SFB 0x100000 /* SFB ASIC */ +#define PMAGB_B_GP0 0x140000 /* general purpose output 0 */ +#define PMAGB_B_GP1 0x180000 /* general purpose output 1 */ +#define PMAGB_B_BT459 0x1c0000 /* Bt459 RAMDAC */ +#define PMAGB_B_FBMEM 0x200000 /* frame buffer */ +#define PMAGB_B_SIZE 0x400000 /* address space size */ -/* - * Bt459 RAM DAC register base offset (rel. to TC slot base address) - */ -#define PMAGB_B_BT459_OFFSET 0x001C0000 +/* IOmem register offsets. */ +#define SFB_REG_VID_HOR 0x64 /* video horizontal setup */ +#define SFB_REG_VID_VER 0x68 /* video vertical setup */ +#define SFB_REG_VID_BASE 0x6c /* video base address */ +#define SFB_REG_TCCLK_COUNT 0x78 /* TURBOchannel clock count */ +#define SFB_REG_VIDCLK_COUNT 0x7c /* video clock count */ -/* - * Begin of PMAGB-B framebuffer memory, resolution is configurable: - * 1024x864x8 or 1280x1024x8, settable by jumper on the card - */ -#define PMAGB_B_ONBOARD_FBMEM_OFFSET 0x00201000 +/* Video horizontal setup register constants. All bits are r/w. */ +#define SFB_VID_HOR_BP_SHIFT 0x15 /* back porch */ +#define SFB_VID_HOR_BP_MASK 0x7f +#define SFB_VID_HOR_SYN_SHIFT 0x0e /* sync pulse */ +#define SFB_VID_HOR_SYN_MASK 0x7f +#define SFB_VID_HOR_FP_SHIFT 0x09 /* front porch */ +#define SFB_VID_HOR_FP_MASK 0x1f +#define SFB_VID_HOR_PIX_SHIFT 0x00 /* active video */ +#define SFB_VID_HOR_PIX_MASK 0x1ff -/* - * Bt459 register offsets, byte-wide registers - */ +/* Video vertical setup register constants. All bits are r/w. */ +#define SFB_VID_VER_BP_SHIFT 0x16 /* back porch */ +#define SFB_VID_VER_BP_MASK 0x3f +#define SFB_VID_VER_SYN_SHIFT 0x10 /* sync pulse */ +#define SFB_VID_VER_SYN_MASK 0x3f +#define SFB_VID_VER_FP_SHIFT 0x0b /* front porch */ +#define SFB_VID_VER_FP_MASK 0x1f +#define SFB_VID_VER_SL_SHIFT 0x00 /* active scan lines */ +#define SFB_VID_VER_SL_MASK 0x7ff + +/* Video base address register constants. All bits are r/w. */ +#define SFB_VID_BASE_MASK 0x1ff /* video base row address */ -#define BT459_ADR_LOW BT459_OFFSET + 0x00 /* addr. low */ -#define BT459_ADR_HIGH BT459_OFFSET + 0x04 /* addr. high */ -#define BT459_DATA BT459_OFFSET + 0x08 /* r/w data */ -#define BT459_CMAP BT459_OFFSET + 0x0C /* color map */ +/* Bt459 register offsets, byte-wide registers. */ +#define BT459_ADDR_LO 0x0 /* address low */ +#define BT459_ADDR_HI 0x4 /* address high */ +#define BT459_DATA 0x8 /* data window register */ +#define BT459_CMAP 0xc /* color map window register */ diff --git a/include/video/sisfb.h b/include/video/sisfb.h index 136bf791643..e402eb5b3c7 100644 --- a/include/video/sisfb.h +++ b/include/video/sisfb.h @@ -1,5 +1,7 @@ /* - * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria. + * sisfb.h - definitions for the SiS framebuffer driver + * + * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -16,8 +18,8 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA */ -#ifndef _LINUX_SISFB -#define _LINUX_SISFB +#ifndef _LINUX_SISFB_H_ +#define _LINUX_SISFB_H_ #include <asm/ioctl.h> #include <asm/types.h> @@ -26,47 +28,35 @@ /* PUBLIC */ /**********************************************/ -/* vbflags */ -#define CRT2_DEFAULT 0x00000001 -#define CRT2_LCD 0x00000002 /* TW: Never change the order of the CRT2_XXX entries */ -#define CRT2_TV 0x00000004 /* (see SISCycleCRT2Type()) */ -#define CRT2_VGA 0x00000008 -#define TV_NTSC 0x00000010 -#define TV_PAL 0x00000020 -#define TV_HIVISION 0x00000040 -#define TV_YPBPR 0x00000080 -#define TV_AVIDEO 0x00000100 -#define TV_SVIDEO 0x00000200 -#define TV_SCART 0x00000400 -#define VB_CONEXANT 0x00000800 /* 661 series only */ -#define VB_TRUMPION VB_CONEXANT /* 300 series only */ -#define TV_PALM 0x00001000 -#define TV_PALN 0x00002000 +/* vbflags, public (others in sis.h) */ +#define CRT2_DEFAULT 0x00000001 +#define CRT2_LCD 0x00000002 +#define CRT2_TV 0x00000004 +#define CRT2_VGA 0x00000008 +#define TV_NTSC 0x00000010 +#define TV_PAL 0x00000020 +#define TV_HIVISION 0x00000040 +#define TV_YPBPR 0x00000080 +#define TV_AVIDEO 0x00000100 +#define TV_SVIDEO 0x00000200 +#define TV_SCART 0x00000400 +#define TV_PALM 0x00001000 +#define TV_PALN 0x00002000 #define TV_NTSCJ 0x00001000 -#define VB_302ELV 0x00004000 -#define TV_CHSCART 0x00008000 -#define TV_CHYPBPR525I 0x00010000 +#define TV_CHSCART 0x00008000 +#define TV_CHYPBPR525I 0x00010000 #define CRT1_VGA 0x00000000 #define CRT1_LCDA 0x00020000 #define VGA2_CONNECTED 0x00040000 -#define VB_DISPTYPE_CRT1 0x00080000 /* CRT1 connected and used */ -#define VB_301 0x00100000 /* Video bridge type */ -#define VB_301B 0x00200000 -#define VB_302B 0x00400000 -#define VB_30xBDH 0x00800000 /* 30xB DH version (w/o LCD support) */ -#define VB_LVDS 0x01000000 -#define VB_CHRONTEL 0x02000000 -#define VB_301LV 0x04000000 -#define VB_302LV 0x08000000 -#define VB_301C 0x10000000 -#define VB_SINGLE_MODE 0x20000000 /* CRT1 or CRT2; determined by DISPTYPE_CRTx */ -#define VB_MIRROR_MODE 0x40000000 /* CRT1 + CRT2 identical (mirror mode) */ -#define VB_DUALVIEW_MODE 0x80000000 /* CRT1 + CRT2 independent (dual head mode) */ +#define VB_DISPTYPE_CRT1 0x00080000 /* CRT1 connected and used */ +#define VB_SINGLE_MODE 0x20000000 /* CRT1 or CRT2; determined by DISPTYPE_CRTx */ +#define VB_MIRROR_MODE 0x40000000 /* CRT1 + CRT2 identical (mirror mode) */ +#define VB_DUALVIEW_MODE 0x80000000 /* CRT1 + CRT2 independent (dual head mode) */ /* Aliases: */ #define CRT2_ENABLE (CRT2_LCD | CRT2_TV | CRT2_VGA) -#define TV_STANDARD (TV_NTSC | TV_PAL | TV_PALM | TV_PALN | TV_NTSCJ) -#define TV_INTERFACE (TV_AVIDEO|TV_SVIDEO|TV_SCART|TV_HIVISION|TV_YPBPR|TV_CHSCART|TV_CHYPBPR525I) +#define TV_STANDARD (TV_NTSC | TV_PAL | TV_PALM | TV_PALN | TV_NTSCJ) +#define TV_INTERFACE (TV_AVIDEO|TV_SVIDEO|TV_SCART|TV_HIVISION|TV_YPBPR|TV_CHSCART|TV_CHYPBPR525I) /* Only if TV_YPBPR is set: */ #define TV_YPBPR525I TV_NTSC @@ -75,89 +65,118 @@ #define TV_YPBPR1080I TV_PALN #define TV_YPBPRALL (TV_YPBPR525I | TV_YPBPR525P | TV_YPBPR750P | TV_YPBPR1080I) -#define VB_SISBRIDGE (VB_301|VB_301B|VB_301C|VB_302B|VB_301LV|VB_302LV|VB_302ELV) -#define VB_SISTVBRIDGE (VB_301|VB_301B|VB_301C|VB_302B|VB_301LV|VB_302LV) -#define VB_VIDEOBRIDGE (VB_SISBRIDGE | VB_LVDS | VB_CHRONTEL | VB_CONEXANT) - #define VB_DISPTYPE_DISP2 CRT2_ENABLE #define VB_DISPTYPE_CRT2 CRT2_ENABLE #define VB_DISPTYPE_DISP1 VB_DISPTYPE_CRT1 #define VB_DISPMODE_SINGLE VB_SINGLE_MODE #define VB_DISPMODE_MIRROR VB_MIRROR_MODE #define VB_DISPMODE_DUAL VB_DUALVIEW_MODE -#define VB_DISPLAY_MODE (SINGLE_MODE | MIRROR_MODE | DUALVIEW_MODE) +#define VB_DISPLAY_MODE (SINGLE_MODE | MIRROR_MODE | DUALVIEW_MODE) /* Structure argument for SISFB_GET_INFO ioctl */ -typedef struct _SISFB_INFO sisfb_info, *psisfb_info; - -struct _SISFB_INFO { - __u32 sisfb_id; /* for identifying sisfb */ +struct sisfb_info { + __u32 sisfb_id; /* for identifying sisfb */ #ifndef SISFB_ID #define SISFB_ID 0x53495346 /* Identify myself with 'SISF' */ #endif - __u32 chip_id; /* PCI-ID of detected chip */ - __u32 memory; /* video memory in KB which sisfb manages */ - __u32 heapstart; /* heap start (= sisfb "mem" argument) in KB */ + __u32 chip_id; /* PCI-ID of detected chip */ + __u32 memory; /* total video memory in KB */ + __u32 heapstart; /* heap start offset in KB */ __u8 fbvidmode; /* current sisfb mode */ - __u8 sisfb_version; - __u8 sisfb_revision; - __u8 sisfb_patchlevel; + __u8 sisfb_version; + __u8 sisfb_revision; + __u8 sisfb_patchlevel; - __u8 sisfb_caps; /* sisfb capabilities */ + __u8 sisfb_caps; /* sisfb capabilities */ __u32 sisfb_tqlen; /* turbo queue length (in KB) */ - __u32 sisfb_pcibus; /* The card's PCI ID */ - __u32 sisfb_pcislot; - __u32 sisfb_pcifunc; + __u32 sisfb_pcibus; /* The card's PCI ID */ + __u32 sisfb_pcislot; + __u32 sisfb_pcifunc; + + __u8 sisfb_lcdpdc; /* PanelDelayCompensation */ + + __u8 sisfb_lcda; /* Detected status of LCDA for low res/text modes */ + + __u32 sisfb_vbflags; + __u32 sisfb_currentvbflags; + + __u32 sisfb_scalelcd; + __u32 sisfb_specialtiming; + + __u8 sisfb_haveemi; + __u8 sisfb_emi30,sisfb_emi31,sisfb_emi32,sisfb_emi33; + __u8 sisfb_haveemilcd; - __u8 sisfb_lcdpdc; /* PanelDelayCompensation */ + __u8 sisfb_lcdpdca; /* PanelDelayCompensation for LCD-via-CRT1 */ - __u8 sisfb_lcda; /* Detected status of LCDA for low res/text modes */ + __u16 sisfb_tvxpos, sisfb_tvypos; /* Warning: Values + 32 ! */ - __u32 sisfb_vbflags; - __u32 sisfb_currentvbflags; + __u32 sisfb_heapsize; /* heap size (in KB) */ + __u32 sisfb_videooffset; /* Offset of viewport in video memory (in bytes) */ - __u32 sisfb_scalelcd; - __u32 sisfb_specialtiming; + __u32 sisfb_curfstn; /* currently running FSTN/DSTN mode */ + __u32 sisfb_curdstn; - __u8 sisfb_haveemi; - __u8 sisfb_emi30,sisfb_emi31,sisfb_emi32,sisfb_emi33; - __u8 sisfb_haveemilcd; + __u16 sisfb_pci_vendor; /* PCI vendor (SiS or XGI) */ - __u8 sisfb_lcdpdca; /* PanelDelayCompensation for LCD-via-CRT1 */ + __u32 sisfb_vbflags2; /* ivideo->vbflags2 */ - __u16 sisfb_tvxpos, sisfb_tvypos; /* Warning: Values + 32 ! */ + __u8 sisfb_can_post; /* sisfb can POST this card */ + __u8 sisfb_card_posted; /* card is POSTED */ + __u8 sisfb_was_boot_device; /* This card was the boot video device (ie is primary) */ - __u8 reserved[208]; /* for future use */ + __u8 reserved[183]; /* for future use */ +}; + +#define SISFB_CMD_GETVBFLAGS 0x55AA0001 /* no arg; result[1] = vbflags */ +#define SISFB_CMD_SWITCHCRT1 0x55AA0010 /* arg[0]: 99 = query, 0 = off, 1 = on */ +/* more to come */ + +#define SISFB_CMD_ERR_OK 0x80000000 /* command succeeded */ +#define SISFB_CMD_ERR_LOCKED 0x80000001 /* sisfb is locked */ +#define SISFB_CMD_ERR_EARLY 0x80000002 /* request before sisfb took over gfx system */ +#define SISFB_CMD_ERR_NOVB 0x80000003 /* No video bridge */ +#define SISFB_CMD_ERR_NOCRT2 0x80000004 /* can't change CRT1 status, CRT2 disabled */ +/* more to come */ +#define SISFB_CMD_ERR_UNKNOWN 0x8000ffff /* Unknown command */ +#define SISFB_CMD_ERR_OTHER 0x80010000 /* Other error */ + +/* Argument for SISFB_CMD ioctl */ +struct sisfb_cmd { + __u32 sisfb_cmd; + __u32 sisfb_arg[16]; + __u32 sisfb_result[4]; }; /* Addtional IOCTLs for communication sisfb <> X driver */ /* If changing this, vgatypes.h must also be changed (for X driver) */ /* ioctl for identifying and giving some info (esp. memory heap start) */ -#define SISFB_GET_INFO_SIZE _IOR(0xF3,0x00,__u32) -#define SISFB_GET_INFO _IOR(0xF3,0x01,struct _SISFB_INFO) +#define SISFB_GET_INFO_SIZE _IOR(0xF3,0x00,__u32) +#define SISFB_GET_INFO _IOR(0xF3,0x01,struct sisfb_info) /* ioctrl to get current vertical retrace status */ -#define SISFB_GET_VBRSTATUS _IOR(0xF3,0x02,__u32) +#define SISFB_GET_VBRSTATUS _IOR(0xF3,0x02,__u32) /* ioctl to enable/disable panning auto-maximize (like nomax parameter) */ -#define SISFB_GET_AUTOMAXIMIZE _IOR(0xF3,0x03,__u32) -#define SISFB_SET_AUTOMAXIMIZE _IOW(0xF3,0x03,__u32) +#define SISFB_GET_AUTOMAXIMIZE _IOR(0xF3,0x03,__u32) +#define SISFB_SET_AUTOMAXIMIZE _IOW(0xF3,0x03,__u32) /* ioctls to relocate TV output (x=D[31:16], y=D[15:0], + 32)*/ -#define SISFB_GET_TVPOSOFFSET _IOR(0xF3,0x04,__u32) -#define SISFB_SET_TVPOSOFFSET _IOW(0xF3,0x04,__u32) +#define SISFB_GET_TVPOSOFFSET _IOR(0xF3,0x04,__u32) +#define SISFB_SET_TVPOSOFFSET _IOW(0xF3,0x04,__u32) + +/* ioctl for internal sisfb commands (sisfbctrl) */ +#define SISFB_COMMAND _IOWR(0xF3,0x05,struct sisfb_cmd) /* ioctl for locking sisfb (no register access during lock) */ /* As of now, only used to avoid register access during * the ioctls listed above. */ -#define SISFB_SET_LOCK _IOW(0xF3,0x06,__u32) - -/* more to come soon */ +#define SISFB_SET_LOCK _IOW(0xF3,0x06,__u32) /* ioctls 0xF3 up to 0x3F reserved for sisfb */ @@ -165,7 +184,7 @@ struct _SISFB_INFO { /* The following are deprecated and should not be used anymore: */ /****************************************************************/ /* ioctl for identifying and giving some info (esp. memory heap start) */ -#define SISFB_GET_INFO_OLD _IOR('n',0xF8,__u32) +#define SISFB_GET_INFO_OLD _IOR('n',0xF8,__u32) /* ioctrl to get current vertical retrace status */ #define SISFB_GET_VBRSTATUS_OLD _IOR('n',0xF9,__u32) /* ioctl to enable/disable panning auto-maximize (like nomax parameter) */ @@ -177,8 +196,8 @@ struct _SISFB_INFO { /* For fb memory manager (FBIO_ALLOC, FBIO_FREE) */ struct sis_memreq { - __u32 offset; - __u32 size; + __u32 offset; + __u32 size; }; /**********************************************/ @@ -187,12 +206,19 @@ struct sis_memreq { /**********************************************/ #ifdef __KERNEL__ + +#include <linux/pci.h> + #define UNKNOWN_VGA 0 #define SIS_300_VGA 1 #define SIS_315_VGA 2 +#define SISFB_HAVE_MALLOC_NEW extern void sis_malloc(struct sis_memreq *req); +extern void sis_malloc_new(struct pci_dev *pdev, struct sis_memreq *req); + extern void sis_free(u32 base); +extern void sis_free_new(struct pci_dev *pdev, u32 base); #endif #endif diff --git a/include/video/w100fb.h b/include/video/w100fb.h index bd548c2b47c..e6da2d7ded8 100644 --- a/include/video/w100fb.h +++ b/include/video/w100fb.h @@ -1,21 +1,149 @@ /* * Support for the w100 frame buffer. * - * Copyright (c) 2004 Richard Purdie + * Copyright (c) 2004-2005 Richard Purdie + * Copyright (c) 2005 Ian Molton * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ +#define W100_GPIO_PORT_A 0 +#define W100_GPIO_PORT_B 1 + +#define CLK_SRC_XTAL 0 +#define CLK_SRC_PLL 1 + +struct w100fb_par; + +unsigned long w100fb_gpio_read(int port); +void w100fb_gpio_write(int port, unsigned long value); + +/* LCD Specific Routines and Config */ +struct w100_tg_info { + void (*change)(struct w100fb_par*); + void (*suspend)(struct w100fb_par*); + void (*resume)(struct w100fb_par*); +}; + +/* General Platform Specific w100 Register Values */ +struct w100_gen_regs { + unsigned long lcd_format; + unsigned long lcdd_cntl1; + unsigned long lcdd_cntl2; + unsigned long genlcd_cntl1; + unsigned long genlcd_cntl2; + unsigned long genlcd_cntl3; +}; + +struct w100_gpio_regs { + unsigned long init_data1; + unsigned long init_data2; + unsigned long gpio_dir1; + unsigned long gpio_oe1; + unsigned long gpio_dir2; + unsigned long gpio_oe2; +}; + +/* Optional External Memory Configuration */ +struct w100_mem_info { + unsigned long ext_cntl; + unsigned long sdram_mode_reg; + unsigned long ext_timing_cntl; + unsigned long io_cntl; + unsigned int size; +}; + +struct w100_bm_mem_info { + unsigned long ext_mem_bw; + unsigned long offset; + unsigned long ext_timing_ctl; + unsigned long ext_cntl; + unsigned long mode_reg; + unsigned long io_cntl; + unsigned long config; +}; + +/* LCD Mode definition */ +struct w100_mode { + unsigned int xres; + unsigned int yres; + unsigned short left_margin; + unsigned short right_margin; + unsigned short upper_margin; + unsigned short lower_margin; + unsigned long crtc_ss; + unsigned long crtc_ls; + unsigned long crtc_gs; + unsigned long crtc_vpos_gs; + unsigned long crtc_rev; + unsigned long crtc_dclk; + unsigned long crtc_gclk; + unsigned long crtc_goe; + unsigned long crtc_ps1_active; + char pll_freq; + char fast_pll_freq; + int sysclk_src; + int sysclk_divider; + int pixclk_src; + int pixclk_divider; + int pixclk_divider_rotated; +}; + +struct w100_pll_info { + uint16_t freq; /* desired Fout for PLL (Mhz) */ + uint8_t M; /* input divider */ + uint8_t N_int; /* VCO multiplier */ + uint8_t N_fac; /* VCO multiplier fractional part */ + uint8_t tfgoal; + uint8_t lock_time; +}; + +/* Initial Video mode orientation flags */ +#define INIT_MODE_ROTATED 0x1 +#define INIT_MODE_FLIPPED 0x2 + /* * This structure describes the machine which we are running on. * It is set by machine specific code and used in the probe routine * of drivers/video/w100fb.c */ - struct w100fb_mach_info { - void (*w100fb_ssp_send)(u8 adrs, u8 data); - int comadj; - int phadadj; + /* General Platform Specific Registers */ + struct w100_gen_regs *regs; + /* Table of modes the LCD is capable of */ + struct w100_mode *modelist; + unsigned int num_modes; + /* Hooks for any platform specific tg/lcd code (optional) */ + struct w100_tg_info *tg; + /* External memory definition (if present) */ + struct w100_mem_info *mem; + /* Additional External memory definition (if present) */ + struct w100_bm_mem_info *bm_mem; + /* GPIO definitions (optional) */ + struct w100_gpio_regs *gpio; + /* Initial Mode flags */ + unsigned int init_mode; + /* Xtal Frequency */ + unsigned int xtal_freq; + /* Enable Xtal input doubler (1 == enable) */ + unsigned int xtal_dbl; +}; + +/* General frame buffer data structure */ +struct w100fb_par { + unsigned int chip_id; + unsigned int xres; + unsigned int yres; + unsigned int extmem_active; + unsigned int flip; + unsigned int blanked; + unsigned int fastpll_mode; + unsigned long hsync_len; + struct w100_mode *mode; + struct w100_pll_info *pll_table; + struct w100fb_mach_info *mach; + uint32_t *saved_intmem; + uint32_t *saved_extmem; }; |