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The longrun cpufreq module reports a false minimum frequency 3MHz on
300-600MHz Crusoe processor. This may be due to a calculation bug
in the module.
Original patch from Kaz Sasayama <kazssym@hypercore.co.jp>
submitted as http://bugs.debian.org/468149 patch ported to x86
Cc: Kaz Sasayama <kazssym@hypercore.co.jp>
Signed-off-by: maximilian attems <max@stro.at>
Signed-off-by: Dave Jones <davej@redhat.com>
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The most common error with powernow-k8 is an ACPI _PSS error
caused either by failure to load the ACPI processor module
or a bad parse of the _PSS object. Make the error message
returned to the user in these situations more straightforward
and easier to understand.
-Mark Langsdorf
Operating System Research Center
AMD
Signed-off-by: Mark Langsdorf <mark.langsdorf@amd.com>
Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
Signed-off-by: Dave Jones <davej@redhat.com>
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Move the scattered checks for PAT support to a single function. Its
moved to addon_cpuid_features.c as this file is shared between 32 and
64 bit.
Remove the manipulation of the PAT feature bit and just disable PAT in
the PAT layer, based on the PAT bit provided by the CPU and the
current CPU version/model white list.
Change the boot CPU check so it works on Voyager somewhere in the
future as well :) Also panic, when a secondary has PAT disabled but
the primary one has alrady switched to PAT. We have no way to undo
that.
The white list is kept for now to ensure that we can rely on known to
work CPU types and concentrate on the software induced problems
instead of fighthing CPU erratas and subtle wreckage caused by not yet
verified CPUs. Once the PAT code has stabilized enough, we can remove
the white list and open the can of worms.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86-fixes
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86-fixes:
x86: fix PCI MSI breaks when booting with nosmp
x86: vget_cycles() __always_inline
x86: add more boot protocol documentation
bootprotocol: cleanup
x86: fix warning in "x86: clean up vSMP detection"
x86: !x & y typo in mtrr code
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* git://git.kernel.org/pub/scm/linux/kernel/git/davej/cpufreq:
[CPUFREQ] state info wrong after resume
[CPUFREQ] allow use of the powersave governor as the default one
[CPUFREQ] document the currently undocumented parts of the sysfs interface
[CPUFREQ] expose cpufreq coordination requirements regardless of coordination mechanism
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Remove proc_root export. Creation and removal works well if parent PDE is
supplied as NULL -- it worked always that way.
So, one useless export removed and consistency added, some drivers created
PDEs with &proc_root as parent but removed them as NULL and so on.
Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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As written, this can never be true.
Spotted by the Sparse checker.
Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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coordination mechanism
Currently, affected_cpus shows which CPUs need to have their frequency
coordinated in software. When hardware coordination is in use, the contents
of this file appear the same as when no coordination is required. This can
lead to some confusion among user-space programs, for example, that do not
know that extra coordination is required to force a CPU core to a particular
speed to control power consumption.
To fix this, create a "related_cpus" attribute that always displays the
coordination map regardless of whatever coordination strategy the cpufreq
driver uses (sw or hw). If the cpufreq driver does not provide a value, fall
back to policy->cpus.
Signed-off-by: Darrick J. Wong <djwong@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Dave Jones <davej@redhat.com>
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back.
We checked the hardware freq with OS cached freq value in get_cur_freqon_cpu().
Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Thomas Renninger <trenn@suse.de>
Signed-off-by: Dave Jones <davej@redhat.com>
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It is claimed that NexGen CPUs were never shipped:
http://lkml.org/lkml/2008/4/20/179
Also, the kernel support for these chips has been broken for
a long time, the code intended to support NexGen thereby being
essentially dead.
As an outcome of the discussion that can be found using the URL
above, this patch removes the NexGen support altogether.
The changes in this patch survived a defconfig build for i386, a
couple of successful randconfig builds, as well as a runtime test,
which consisted in booting a 32-bit x86 box up to the shell prompt.
Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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There are no users for the function amd_init_cpu() defined in
arch/x86/kernel/cpu/amd.c. This patch removes this routine.
This patch was build-tested using defconfigs for i386 and x86_64,
and a few randconfig instances. Runtime tests were performed by
booting 32- and 64-bit x86 boxen up to the shell prompt.
Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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At least on my Barcelona, I see MCE log entries after cold boot caused
by BIOS not properly clearing the respective registers. Therefore, this
patch extends the workaround to families 0x10 and 0x11 (the latter just
for completeness, I have nothing to verify this against).
At the same time, provide a way to make these entries visible via the
'mce=bootlog' command line option even on these machines.
Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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There apparently was an unnoticed conflict between an earlier patch to
this file and mine (d1e084746b0e5806e6345ab31c5b370f8dee2b23), which
I noticed only now. I suppose a change like the one below (untested) is
needed; I didn't get any response on a confirmation request for this from
the submitter of the first patch.
The issue is the writing of the 'checkbit' member at the end of
setup_intel_arch_watchdog(), which my patch made go to intel_arch_wd_ops
rather than wd_ops.
Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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git://git.kernel.org/pub/scm/linux/kernel/git/willy/misc
* 'semaphore' of git://git.kernel.org/pub/scm/linux/kernel/git/willy/misc:
Deprecate the asm/semaphore.h files in feature-removal-schedule.
Convert asm/semaphore.h users to linux/semaphore.h
security: Remove unnecessary inclusions of asm/semaphore.h
lib: Remove unnecessary inclusions of asm/semaphore.h
kernel: Remove unnecessary inclusions of asm/semaphore.h
include: Remove unnecessary inclusions of asm/semaphore.h
fs: Remove unnecessary inclusions of asm/semaphore.h
drivers: Remove unnecessary inclusions of asm/semaphore.h
net: Remove unnecessary inclusions of asm/semaphore.h
arch: Remove unnecessary inclusions of asm/semaphore.h
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git://git.kernel.org/pub/scm/linux/kernel/git/mingo/linux-2.6-sched-devel
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mingo/linux-2.6-sched-devel: (62 commits)
sched: build fix
sched: better rt-group documentation
sched: features fix
sched: /debug/sched_features
sched: add SCHED_FEAT_DEADLINE
sched: debug: show a weight tree
sched: fair: weight calculations
sched: fair-group: de-couple load-balancing from the rb-trees
sched: fair-group scheduling vs latency
sched: rt-group: optimize dequeue_rt_stack
sched: debug: add some debug code to handle the full hierarchy
sched: fair-group: SMP-nice for group scheduling
sched, cpuset: customize sched domains, core
sched, cpuset: customize sched domains, docs
sched: prepatory code movement
sched: rt: multi level group constraints
sched: task_group hierarchy
sched: fix the task_group hierarchy for UID grouping
sched: allow the group scheduler to have multiple levels
sched: mix tasks and groups
...
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* Removed kmalloc (or local array) in show_shared_cpu_map().
* Added show_shared_cpu_list() function.
Signed-off-by: Mike Travis <travis@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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* Modify sched_affinity functions to pass cpumask_t variables by reference
instead of by value.
* Use new set_cpus_allowed_ptr function.
Depends on:
[sched-devel]: sched: add new set_cpus_allowed_ptr function
Cc: Paul Jackson <pj@sgi.com>
Cc: Cliff Wickman <cpw@sgi.com>
Signed-off-by: Mike Travis <travis@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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* Use new set_cpus_allowed_ptr() function added by previous patch,
which instead of passing the "newly allowed cpus" cpumask_t arg
by value, pass it by pointer:
-int set_cpus_allowed(struct task_struct *p, cpumask_t new_mask)
+int set_cpus_allowed_ptr(struct task_struct *p, const cpumask_t *new_mask)
* Cleanup uses of CPU_MASK_ALL.
* Collapse other NR_CPUS changes to arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
Use pointers to cpumask_t arguments whenever possible.
Depends on:
[sched-devel]: sched: add new set_cpus_allowed_ptr function
Cc: Len Brown <len.brown@intel.com>
Cc: Dave Jones <davej@codemonkey.org.uk>
Signed-off-by: Mike Travis <travis@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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* Change the following static arrays sized by NR_CPUS to
per_cpu data variables:
_cpuid4_info *cpuid4_info[NR_CPUS];
_index_kobject *index_kobject[NR_CPUS];
kobject * cache_kobject[NR_CPUS];
* Remove the local NR_CPUS array with a kmalloc'd region in
show_shared_cpu_map().
Also some minor complaints from checkpatch.pl fixed.
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Mike Travis <travis@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Remove old comments that include the old arch/i386 directory.
Signed-off-by: WANG Cong <xiyou.wangcong@gmail.com>
Acked-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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None of these files use any of the functionality promised by
asm/semaphore.h. It's possible that they rely on it dragging in some
unrelated header file, but I can't build all these files, so we'll have
fix any build failures as they come up.
Signed-off-by: Matthew Wilcox <willy@linux.intel.com>
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take them out of the x86_64-specific asm/mach_apic.h
Signed-off-by: Glauber Costa <gcosta@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Signed-off-by: Ingo Molnar <mingo@elte.hu>
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make known_pat_cpu to think amd k8 and fam10h is ok too.
also make tom2 below to be WRBACK
Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Sets up pat_init() infrastructure.
PAT MSR has following setting.
PAT
|PCD
||PWT
|||
000 WB _PAGE_CACHE_WB
001 WC _PAGE_CACHE_WC
010 UC- _PAGE_CACHE_UC_MINUS
011 UC _PAGE_CACHE_UC
We are effectively changing WT from boot time setting to WC.
UC_MINUS is used to provide backward compatibility to existing /dev/mem
users(X).
reserve_memtype and free_memtype are new interfaces for maintaining alias-free
mapping. It is currently implemented in a simple way with a linked list and
not optimized. reserve and free tracks the effective memory type, as a result
of PAT and MTRR setting rather than what is actually requested in PAT.
pat_init piggy backs on mtrr_init as the rules for setting both pat and mtrr
are same.
Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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store initial_apicid from early identify. it is could be different from
phys_proc_id later.
also print it out in /proc/cpuinfo.
Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Signed-off-by: Alexey Dobriyan <adobriyan@sw.ru>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Before:
total: 55 errors, 6 warnings, 727 lines checked
After:
total: 0 errors, 3 warnings, 734 lines checked
No code changed:
arch/x86/kernel/cpu/common.o:
text data bss dec hex filename
3500 4611 44 8155 1fdb common.o.before
3500 4611 44 8155 1fdb common.o.after
md5:
e37091f11fbeb682c0db152ac3022a38 common.o.before.asm
e37091f11fbeb682c0db152ac3022a38 common.o.after.asm
Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Before:
total: 46 errors, 10 warnings, 450 lines checked
After:
total: 1 errors, 10 warnings, 449 lines checked
No code changed:
arch/x86/kernel/cpu/cyrix.o:
text data bss dec hex filename
2048 908 4 2960 b90 cyrix.o.before
2048 908 4 2960 b90 cyrix.o.after
md5:
9add5e69dbd788f91ff24eea8462dad7 cyrix.o.before.asm
9add5e69dbd788f91ff24eea8462dad7 cyrix.o.after.asm
Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Before:
total: 10 errors, 3 warnings, 90 lines checked
After:
total: 0 errors, 3 warnings, 90 lines checked
No code changed:
arch/x86/kernel/cpu/mcheck/mce_32.o:
text data bss dec hex filename
287 42 12 341 155 mce_32.o.before
287 42 12 341 155 mce_32.o.after
md5:
fede5ff8e6bc3f62e8e691ca6c45eb39 mce_32.o.before.asm
fede5ff8e6bc3f62e8e691ca6c45eb39 mce_32.o.after.asm
Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Before:
total: 4 errors, 0 warnings, 36 lines checked
After:
total: 0 errors, 0 warnings, 36 lines checked
No code changed:
arch/x86/kernel/cpu/mcheck/winchip.o:
text data bss dec hex filename
222 0 4 226 e2 winchip.o.before
222 0 4 226 e2 winchip.o.after
md5:
9caefa12256c5f7d71ef324f6d01a2d5 winchip.o.before.asm
9caefa12256c5f7d71ef324f6d01a2d5 winchip.o.after.asm
Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Before:
total: 5 errors, 5 warnings, 91 lines checked
After:
total: 0 errors, 0 warnings, 94 lines checked
No code changed:
arch/x86/kernel/cpu/mcheck/non-fatal.o:
text data bss dec hex filename
441 80 4 525 20d non-fatal.o.before
441 80 4 525 20d non-fatal.o.after
md5:
137bc114d2020ad331d5e76444a2c7d3 non-fatal.o.before.asm
137bc114d2020ad331d5e76444a2c7d3 non-fatal.o.after.asm
Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Before:
total: 42 errors, 26 warnings, 350 lines checked
After:
total: 0 errors, 26 warnings, 352 lines checked
No code changed:
arch/x86/kernel/cpu/amd.o:
text data bss dec hex filename
1936 328 0 2264 8d8 amd.o.before
1936 328 0 2264 8d8 amd.o.after
md5:
873430a88faaf31bb4bbfe3a2a691e45 amd.o.before.asm
873430a88faaf31bb4bbfe3a2a691e45 amd.o.after.asm
Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Before:
total: 13 errors, 3 warnings, 105 lines checked
After:
total: 0 errors, 3 warnings, 107 lines checked
No code changed:
arch/x86/kernel/cpu/transmeta.o:
text data bss dec hex filename
713 324 0 1037 40d transmeta.o.before
713 324 0 1037 40d transmeta.o.after
md5:
19abe2cafac617e1e2aadc4aa4e9923b transmeta.o.before.asm
19abe2cafac617e1e2aadc4aa4e9923b transmeta.o.after.asm
Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Before:
total: 6 errors, 5 warnings, 80 lines checked
After:
total: 0 errors, 4 warnings, 82 lines checked
No code changed:
arch/x86/kernel/cpu/mtrr/state.o:
text data bss dec hex filename
313 0 4 317 13d state.o.before
313 0 4 317 13d state.o.after
md5:
a0fbd61096205f9180f0bf45ed386d61 state.o.before.asm
a0fbd61096205f9180f0bf45ed386d61 state.o.after.asm
Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Before:
total: 37 errors, 16 warnings, 366 lines checked
After:
total: 0 errors, 15 warnings, 369 lines checked
No code changed:
arch/x86/kernel/cpu/intel.o:
text data bss dec hex filename
1534 452 0 1986 7c2 intel.o.before
1534 452 0 1986 7c2 intel.o.after
md5:
1ca348a06de6eb354c4b6ea715a57db5 intel.o.before.asm
1ca348a06de6eb354c4b6ea715a57db5 intel.o.after.asm
Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Before:
total: 3 errors, 1 warnings, 23 lines checked
After:
total: 0 errors, 0 warnings, 25 lines checked
No code changed:
arch/x86/kernel/cpu/umc.o:
text data bss dec hex filename
24 616 0 640 280 umc.o.before
24 616 0 640 280 umc.o.after
md5:
e8daa3eaed0963a0cdd2e83c2e1f9823 umc.o.before.asm
e8daa3eaed0963a0cdd2e83c2e1f9823 umc.o.after.asm
Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Before:
total: 16 errors, 13 warnings, 122 lines checked
After:
total: 0 errors, 0 warnings, 122 lines checked
No code changed:
arch/x86/kernel/cpu/mcheck/p6.o:
text data bss dec hex filename
1082 0 8 1090 442 p6.o.before
1082 0 8 1090 442 p6.o.after
md5:
4e283fbc1b68240f1724d9725007d379 p6.o.before.asm
4e283fbc1b68240f1724d9725007d379 p6.o.after.asm
Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Now cpu/proc.c and cpu/proc_64.c are same.
So cpu/proc_64.c can be removed.
Signed-off-by: Hiroshi Shimamoto <h-shimamoto@ct.jp.nec.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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